The ADS8353-Q1 supports single-ended or pseudo-differential analog inputs on both ADC channels. These inputs are sampled and converted simultaneously by the two ADCs, ADC_A and ADC_B. ADC_A samples and converts (V_{AINP_A} – V_{AINM_A}), and ADC_B samples and converts (V_{AINP_B} – V_{AINM_B}).

Figure 7-2a and Figure 7-2b show equivalent circuits for the ADC_A and ADC_B analog input pins, respectively. Series resistance, R_S, represents the on-state sampling switch resistance (typically 50 Ω) and C_SAMPLE is the device sampling capacitor (typically 40 pF).

Figure 7-2 Equivalent Circuit for the Analog Input Pins