8.2.2.9 Selecting the Input and Output Capacitors

The output capacitor is mainly selected to meet the requirements for the output ripple and load transient. Then the loop is compensated for the output capacitor selected. The output ripple voltage is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated using Equation 10:

Equation 10.

where V_ripple = peak to peak output ripple. The additional output ripple component caused by ESR is calculated using:

V_{ripple_ESR} = I × R_ESR

Due to its low ESR, V_{ripple_ESR} can be neglected for ceramic capacitors, but must be considered if tantalum or electrolytic capacitors are used.

The minimum ceramic output capacitance needed to meet a load transient requirement can be estimated using Equation 11:

Equation 11.

where

• ΔI_TRAN is the transient load current step
• ΔV_TRAN is the allowed voltage dip for the load current step
• f_LOOP-BW is the control loop bandwidth (that is, the frequency where the control loop gain crosses zero).

Care must be taken when evaluating a ceramic capacitor’s derating under DC bias, aging and AC signal. For example, larger form factor capacitors (in 1206 size) have their self resonant frequencies in the range of the switching frequency. So the effective capacitance is significantly lower. The DC bias can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, one must add margin on the voltage rating to ensure adequate capacitance at the required output voltage.

For a typical boost converter implementation, at least 4.7 μF of ceramic input and output capacitance is recommended. Additional input and output capacitance may be required to meet ripple and/or transient requirements.

The popular vendors for high value ceramic capacitors are:

TDK (http://www.component.tdk.com/components.php)

Murata (http://www.murata.com/cap/index.html)