ZHCSJO2C May   2019  – April 2020 TPS7B81-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      典型应用原理图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Enable (EN)
      2. 7.3.2 Undervoltage Shutdown
      3. 7.3.3 Current Limit
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN Lower Than 3 V
      2. 7.4.2 Operation With VIN Larger Than 3 V
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Power Dissipation
        1. 8.1.1.1 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Output Capacitor
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

Electrical Characteristics

over operating ambient temperature range, TJ = –40°C to +150°C, VIN = 14 V, and 10-µF ceramic output capacitor (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE AND CURRENT (IN)
VIN Input voltage VOUT(Nom) + V(Dropout) 40 V
I(SD) Shutdown current EN = 0 V 0.3 1 µA
I(Q) Quiescent current VIN = 6 V to 40 V, EN ≥ 2 V,
IOUT = 0 mA
1.9 3.5 µA
VIN = 6 V to 40 V, EN ≥ 2 V,
IOUT = 0.2 mA
DGN package 2.7 6.5
DRV and KVU packages 2.7 4.5
V(IN, UVLO) VIN undervoltage detection Ramp VIN down until the output turns off 2.7 V
Hysteresis 200 mV
ENABLE INPUT (EN)
VIL Logic-input low level 0.7 V
VIH Logic-input high level 2 V
IEN Enable current 10 nA
REGULATED OUTPUT (OUT)
VOUT Regulated output VIN = VOUT + V(Dropout) to 40 V,
IOUT = 1 mA to 150 mA
–1.5% 1.5%
V(Line-Reg) Line regulation VIN = 6 V to 40 V, IOUT = 10 mA 10 mV
V(Load-Reg) Load regulation VIN = 14 V, IOUT = 1 mA to 150 mA DGN package 20 mV
DRV and KVU packages 10
V(Dropout) Dropout voltage VOUT = 5 V IOUT = 150 mA DGN package 270 540 mV
DRV and KVU packages 325 585
IOUT = 100 mA DGN package 180 350
DRV and KVU packages 200 390
VOUT = 3.3 V IOUT = 150 mA DGN package 650
DRV and KVU packages 345 675
IOUT = 100 mA 255 450
VOUT = 2.5 V,
DGN package
IOUT = 150 mA 750
IOUT = 100 mA 500
IOUT Output current VOUT in regulation, VIN = 7 V for the fixed 5-V option, VIN = 5.8 V for the fixed 3.3-V option 0 150 mA
I(CL) Output current limit VOUT short to 90% × VOUT 180 510 690 mA
PSRR Power-supply ripple rejection V(Ripple) = 0.5 VPP, IOUT = 10 mA, frequency = 100 Hz, COUT = 2.2 µF 60 dB
OPERATING TEMPERATURE RANGE
T(SD) Junction shutdown temperature 175 ºC
T(HYST) Hysteresis of thermal shutdown 20 ºC