ZHCSJR9A May   2019  – November 2019 AMC1035-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      应用示例
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1      Absolute Maximum Ratings
    2. 6.2      ESD Ratings Automotive
    3. Table 1. Recommended Operating Conditions
    4. 6.3      Thermal Information
    5. 6.4      Electrical Characteristics
    6. 6.5      Switching Characteristics
    7. 6.6      Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Reference Output
      4. 7.3.4 Clock Input
      5. 7.3.5 Digital Output
      6. 7.3.6 Manchester Coding Feature
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Behavior in Case of a Full-Scale Input
      2. 7.4.2 Fail-Safe Output
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Digital Filter Usage
    2. 8.2 Typical Applications
      1. 8.2.1 Voltage Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 IGBT Temperature Sensing
      3. 8.2.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

6.4 Electrical Characteristics

minimum and maximum specifications are at TA = –40°C to 125°C, VDD = 3.0 V to 5.5 V, AINP = –1 V to 1 V, AINN = 0 V, and sinc3 filter with OSR = 256, unless otherwise noted. Typical values are at TA = 25°C, CLKIN = 20 MHz, and VDD = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
VCMuv Negative common-mode undervoltage detection level (VAINP + VAINN) / 2 to GND, VAINP = VAINN –1.45 V
(VAINP + VAINN) / 2 to GND, |VAINP – VAINN| = 1.25 V –0.85
VCMov Positive common-mode overvoltage detection level (VAINP + VAINN) / 2 to GND, VAINP = VAINN,
3.0 V ≤ VDD < 4.5 V 		VDD – 1.35 V
(VAINP + VAINN) / 2 to GND, |VAINP – VAINN| = 1.25 V,
3.0 V ≤ VDD < 4.5 V 		VDD – 2.35
(VAINP + VAINN) / 2 to GND, VAINP = VAINN,
4.5 V ≤ VDD ≤ 5.5 V 		2.75
(VAINP + VAINN) / 2 to GND, |VAINP – VAINN| = 1.25 V,
4.5 V ≤ VDD ≤ 5.5 V 		2.15
RIN Single-ended input resistance AINN = GND 0.1 0.4 GΩ
RIND Differential input resistance 0.16 1.6 GΩ
CIN Single-ended input capacitance AINN = GND 2 pF
CIND Differential input capacitance 2 pF
IIB Input bias current AINP = AINN = GND; IIB = (IIBP + IIBN) / 2 –10 ±3 10 nA
TCIIB Input bias current drift AINP = AINN = GND; IIB = (IIBP + IIBN) / 2 ±5 pA/°C
IIO Input offset current IIO = IIBP - IIBN –5 ±1 5 nA
CMRR Common-mode rejection ratio fIN = 0 Hz, VCMmin ≤ VIN ≤ VCMmax –104 dB
fIN from 0.1 Hz to 50 kHz, VCMmin ≤ VIN ≤ VCMmax –88
DC ACCURACY
Resolution Decimation filter output set to 16 bits 16 Bit
INL Integral nonlinearity Resolution: 16 bits –12 ±2 12 LSB
EO Offset error Initial, at 25°C, AINP = AINN = GND –0.5 ±0.03 0.5 mV
TCEO Offset error thermal drift –6 ±0.1 6 µV/°C
EG Gain error Initial, at 25°C –0.25 ±0.02 0.25 %
Initial, at 25°C, ratiometric mode –0.3 ±0.02 0.3
TCEG Gain error thermal drift –45 ±20 45 ppm/°C
ratiometric mode –15 ±4 15
PSRR Power-supply rejection ratio AINP = AINN = GND, VDD from 3.0 V to 5.5 V, at DC –90 dB
AINP = AINN = GND, VDD from 3.0 V to 5.5 V,
10 kHz / 100 mV ripple		 –84
AC ACCURACY
SNR Signal-to-noise ratio fIN = 1 kHz 81 87 dB
SINAD Signal-to-noise + distortion fIN = 1 kHz 77 83 dB
THD Total harmonic distortion fIN = 1 kHz –87 –78 dB
SFDR Spurious-free dynamic range fIN = 1 kHz 78 87 dB
REFERENCE OUTPUT
VREF Reference output voltage Initial, at 25°C, no load 2.495 2.5 2.505 V
TCVREF Reference output voltage drift –50 ±20 50 ppm/°C
IREF Reference output current CLOAD < 1 nF –5 5 mA
Load regulation Load to GND or VDD, 0mA to 5mA 0.15 0.35 mV/mA
ISC Short-circuit current REFOUT to GND 23 mA
REFOUT to VDD –21
PSRR Power-supply rejection ratio –200 ±30 200 μV/V
DIGITAL INPUT/OUTPUT
IIN Input current GND ≤ VIN ≤ VDD 35 μA
CIN Input capacitance 3 pF
VIH High-level input voltage 0.7 x VDD VDD + 0.3 V
VIL Low-level input voltage –0.3 0.3 x VDD V
CLOAD Output load capacitance fCLKIN = 21 MHz 15 30 pF
VOH High-level output voltage IOH = –20 µA VDD – 0.1 V
IOH = –4 mA VDD – 0.4
VOL Low-level output voltage IOL = 20 µA 0.1 V
IOL = 4 mA 0.4
POWER SUPPLY
IVDD Supply current 3.0 V ≤ VDD ≤ 3.6 V, IREFOUT = 0 mA, MCE = 0,
CLOAD = 15 pF		 5.2 6.8 mA
3.0 V ≤ VDD ≤ 3.6 V, IREFOUT = 0 mA, MCE = 1,
CLOAD = 15 pF		 4.6 6.1
4.5 V ≤ VDD ≤ 5.5 V, IREFOUT = 0 mA, MCE = 0,
CLOAD = 15 pF		 6.4 8.3
4.5 V ≤ VDD ≤ 5.5 V, IREFOUT = 0 mA, MCE = 1,
CLOAD = 15 pF		 5.4 7.2
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