ZHCSJU9E January 2007 – June 2019 TPS40077
PRODUCTION DATA.
Similar criteria to the foregoing can be used for the rectifier MOSFET. There is one significant difference: due to the body diode conducting, the rectifier MOSFET switches with zero voltage across its drain and source, so effectively with zero switching losses. However, there are some losses in the body diode. These are minimized by reducing the delay time between the transition from the switching MOSFET turnoff to rectifier MOSFET turnon and vice-versa. The TPS40077 incorporates TI's proprietary Predictive Gate Drive circuitry (PGD), which helps reduce these delays to around 10 ns.
To calculate the losses in the rectifier MOSFET, use Equation 30 through Equation 33.
where
Estimating the body diode losses based on a forward voltage of 1 V gives 0.072 W. The gate losses are unknown at this time, so assume 0.1-W gate losses. This leaves 0.428 W for conduction losses. Using this figure, a target RDS(on) of 5 mΩ was calculated.
The Si7336ADP from Vishay was chosen. Using the parameters from its data sheet, the actual expected power losses are calculated. Conduction loss is 0.317 W, body diode loss is 0.072 W, and the gate loss is 0.136W. This totals 0.525 W associated with the rectifier MOSFET.
Two other criteria should be verified before finalizing on the rectifier MOSFET. One is the requirement to ensure that predictive gate drive functions correctly. The turnoff delay of the Si7336ADP is 97 ns. The minimum turnoff delay of the Si7860DP is 25 ns. Together these devices meet the 130-ns requirement.
Secondly, the ratio between Cgs and Cgd should be greater than 1. The Si7336ADP easily meets this criterion. This helps reduce the risk of dv/dt-induced turnon of the rectifier MOSFET. If this is likely to be a problem, a small resistor may be added in series with the boost capacitor, CBOOST.