At T_A ≈ 25°C, A_V = 10 V/V, R_F = 1.24 kΩ, R_L = 50 Ω, R_S = 2.5 Ω, R_ADJ = 0 Ω, full-bias mode, and VCM = open (unless otherwise noted).

VO = 2 VPP

Figure 6-1 Small-Signal Frequency Response

SGCC HPLC profiles, crest factor = 5 V/V, see the Broadband PLC Line Driving section for more details.

Figure 6-3 Out-of-Band Suppression

AV = 10 V/V, VO = 2 VPP

Figure 6-5 Small-Signal Frequency Response vs R_F

AV = 10 V/V, VO = 2 VPP

Figure 6-7 Small-Signal Gain Flatness vs R_F

VO = 16 VPP

Figure 6-9 Large-Signal Gain Flatness

AV = 10 V/V

Figure 6-11 Large-Signal Frequency Response vs V_O

AV = 10 V/V, VO = 2 VPP

Figure 6-13 Small-Signal Frequency Response vs Bias Modes

AV = 15 V/V, VO = 16 VPP

Figure 6-15 Large-Signal Frequency Response vs Bias Modes

VO = 2 VPP

Figure 6-17 Harmonic Distortion vs Frequency

f = 1 MHz, AV = 10 V/V

Figure 6-19 Harmonic Distortion vs V_O

f = 1 MHz, VO = 2 VPP, AV = 10 V/V

Figure 6-21 Harmonic Distortion vs R_L

±12.2 kHz tone spacing, VO = 2 VPP per tone

Figure 6-23 Intermodulation Distortion vs Frequency

VO step = 2 VPP

Figure 6-25 Small-Signal Pulse Response

Full-bias simulation

Figure 6-27 Open-Loop Transimpedance Gain and Phase vs Frequency

Low-bias simulation

Figure 6-29 Open-Loop Transimpedance Gain and Phase vs Frequency

RL = no load, average of 30 devices

Figure 6-31 Quiescent Current vs Single-Supply Voltage

RL = no load, average of 30 devices

Figure 6-33 Quiescent Current vs Temperature

B1 = full-bias to mid-bias transition with B2 = DGND, B2 = full-bias to low-bias transition with B1 = DGND, DGND = VS–

Figure 6-35 Mode Transition Voltage Threshold

VO = 16 VPP

Figure 6-2 Large-Signal Frequency Response

AV = 15 V/V, VO = 2 VPP

Figure 6-4 Small-Signal Frequency Response vs Temperature

AV = 15 V/V, VO = 2 VPP

Figure 6-6 Small-Signal Frequency Response vs R_F

AV = 15 V/V, VO = 2 VPP

Figure 6-8 Small-Signal Gain Flatness vs R_F

VO = 100 mVPP

Frequency response is measured at the device output pin before the isolation resistor.

Figure 6-10 Small-Signal Frequency Response vs C_LOAD

AV = 15 V/V

Figure 6-12 Large-Signal Frequency Response vs V_O

AV = 15 V/V, VO = 2 VPP

Figure 6-14 Small-Signal Frequency Response vs Bias Modes

Figure 6-16 Input Voltage and Current Noise Density vs Frequency

f = 1 MHz, VO = 2 VPP

Figure 6-18 Harmonic Distortion vs Gain

f = 10 MHz, AV = 10 V/V

Figure 6-20 Harmonic Distortion vs V_O

f = 10 MHz, VO = 2 VPP, AV = 10 V/V

Figure 6-22 Harmonic Distortion vs R_L

VIN = 2.8-VPP triangular waveform

Figure 6-24 Overdrive Recovery

VO step = 16 VPP

Figure 6-26 Large-Signal Pulse Response

Mid-bias simulation

Figure 6-28 Open-Loop Transimpedance Gain and Phase vs Frequency

Simulation

Figure 6-30 Open-Loop Output Impedance vs Frequency

Average of 30 devices

Figure 6-32 Quiescent Current vs R_ADJ

TJ = 50°C, simulation

Figure 6-34 PSRR and CMRR vs Frequency

Figure 6-36 Full-Bias and Shutdown Mode Transition Timing