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ZHCSKA7F May 2019 – June 2021 LM61460-Q1

PRODUCTION DATA

8.4 Thermal Information

The value of R_θJA given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD 51-7, and simulated on a 4-layer JEDEC board. They do not represent the performance obtained in an actual application. For example, with a 4-layer PCB, a R_ΘJA = 25℃/W can be achieved. For design information see Maximum Ambient Temperature versus Output Current.

THERMAL METRIC ⁽¹⁾⁽²⁾		LM61460-Q1	UNIT
		RJR (QFN)
		14 PINS
R_θJA	Junction-to-ambient thermal resistance (LM61460-Q1 EVM)	25	°C/W
R_θJA	Junction-to-ambient thermal resistance (JESD 51-7)	58.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	26.1	°C/W
R_θJB	Junction-to-board thermal resistance	19.2	°C/W
Ψ_JT	Junction-to-top characterization parameter	1.4	°C/W
Ψ_JB	Junction-to-board characterization parameter	19	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	-	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

(2) The value of R_θJA given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD 51-7, and simulated on a 4-layer JEDEC board. They do not represent the performance obtained in an actual application.