6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(3)
|
MIN |
NOM |
MAX |
UNIT |
| VDD |
Supply voltage |
10 |
|
16.5 |
V |
| VDD |
Supply voltage bypass capacitor(1) |
|
10 × CREF |
|
µF |
| CREF |
Reference bypass capacitor (UCC1895)(2) |
0.1 |
|
1 |
µF |
| CREF |
Reference bypass capacitor (UCC2895, UCC3895)(2) |
0.1 |
|
4.7 |
µF |
| CT |
Timing capacitor (for 500-kHz switching frequency) |
|
220 |
|
pF |
| RT |
Timing resistor (for 500-kHz switching frequency) |
|
82 |
|
kΩ |
| RDEL_AB, RDEL_CD |
Delay resistor |
2.5 |
|
40 |
kΩ |
| TJ |
Operating junction temperature(4) |
–55 |
|
125 |
°C |
(1) The VDD capacitor must be a low ESR, ESL ceramic capacitor located directly across the VDD and PGND pins. A larger bulk capacitor must be located as physically close as possible to the VDD pins.
(2) The VREF capacitor must be a low ESR, ESL ceramic capacitor located directly across the REF and GND pins. If a larger capacitor is desired for the VREF then it must be located near the VREF cap and connected to the VREF pin with a resistor of 51 Ω or greater. The bulk capacitor on VDD must be a factor of 10 greater than the total VREF capacitance.
(3) TI recommends that there be a single point grounded between GND and PGND directly under the device. There must be a separate ground plane associated with the GND pin and all components associated with pins 1 through 12, plus 19 and 20, be located over this ground plane. Any connections associated with these pins to ground must be connected to this ground plane.
(4) TI does not recommended that the device operate under conditions beyond those specified in this table for extended periods of time.