ZHCSL04A March   2020  – July 2020 ISO1044

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions—8 Pins
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics - DC Specification
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. 7 Parametric Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Timeout (DTO)
        2. 8.3.3.2 Thermal Shutdown (TSD)
        3. 8.3.3.3 Undervoltage Lockout and Default State
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 Unpowered Device
        6. 8.3.3.6 CAN Bus Short Circuit Current Limiting
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6.9 Electrical Characteristics - DC Specification

Typical specifications are at VCC1 = 3.3 V, VCC2 = 5 V, Min/Max are over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CHARACTERISTICS
ICC1 Supply current Side 1 VCC1 =1.71 V to 1.89 V, TXD = 0 V, bus dominant   2.3 3.5 mA
VCC1 = 2.25 V to 5.5 V, TXD = 0 V, bus dominant   2.4 3.5 mA
VCC1 = 1.71 V to 1.89 V, TXD = VCC1, bus recessive   1.2 2.1 mA
VCC1 = 2.25 V to 5.5 V, TXD = VCC1, bus recessive   1.3 2.1 mA
VCC1=4.5 to 5.5V, TXD= 1Mbps 50% duty square wave 1.8 2.7 mA
VCC1=4.5 to 5.5V, TXD= 5Mbps 50% duty square wave 1.8 2.7 mA
ICC2 Supply current Side 2 TXD = 0 V, bus dominant, RL = 60 Ω   52 70 mA
TXD = VCC1, bus recessive, RL = 60 Ω   5.9 9 mA
VCC2=4.5 to 5.5V, TXD= 1Mbps 50% duty square wave, RL= 60 ohm 29.5 38 mA
VCC2=4.5 to 5.5V, TXD= 5Mbps 50% duty square wave, RL= 60 ohm 29.5 39 mA
UVVCC1+ Rising under voltage detection, Side 1   1.7 V
UVVCC1- Falling under voltage detection, Side 1 1.0   V
VHYS(UVCC1) Hysterisis voltage on VCC1 undervoltage lock-out 80.0 125   mV
UVVCC2+ Rising under voltage detection, side 2   4.2 4.45 V
UVVCC2- Falling under voltage detection, side 2 3.8 4.0 4.25 V
VHYS(UVCC2) Hysterisis voltage on VCC2 undervoltage lock-out   200 mV
TXD TERMINAL
VIH High level input voltage 0.7×VCC1 V
VIL Low level input voltage 0.3×VCC1 V
IIH High level input leakage current TXD = VCC1 1 µA
IIL Low level input leakage current TXD = 0V -20 µA
CI Input capacitance VIN = 0.4 x sin(2 x π x 1E+6 x t) + 1.65 V, VCC1 = 3.3 V 2 pF
RXD TERMINAL
VOH - VCC1 High level output voltage See Figure 7-4, IO = -4 mA for 4.5 V ≤ VCC1 ≤ 5.5 V -0.4 -0.2   V
See Figure 7-4, IO = -2 mA for 3.0 V ≤ VCC1 ≤ 3.6 V -0.2 -0.06   V
See Figure 7-4, IO = -1 mA for 2.25 V ≤ VCC1 ≤ 2.75 V -0.1 -0.04   V
See Figure 7-4, IO = -1 mA for 1.71 V ≤ VCC1 ≤ 1.89 V -0.1 -0.04   V
VOL Low level output voltage See Figure 7-4, IO = 4 mA for 4.5 V ≤ VCC1 ≤ 5.5 V 0.2 0.4 V
See Figure 7-4, IO = 2 mA for 3.0 V ≤ VCC1 ≤ 3.6 V 0.07 0.2 V
See Figure 7-4, IO = 1 mA for 2.25 V ≤ VCC1 ≤ 2.75 V 0.035 0.1 V
See Figure 7-4, IO = 1 mA for 1.71 V ≤ VCC1 ≤ 1.89 V 0.04 0.1 V
DRIVER ELECTRICAL CHARACTERISTICS
VO(DOM) Bus output voltage(Dominant), CANH See Figure 7-1  and Figure 7-2 , TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, and CL = open 2.75 4.5 V
Bus output voltage(Dominant), CANL See Figure 7-1  and Figure 7-2 ,TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, and CL = open 0.5 2.25 V
VO(REC) Bus output voltage(recessive), CANH and CANL See Figure 7-1  and Figure 7-2 ,TXD = VCC1 and RL = open 2.0 0.5 x VCC2 3.0 V
VOD(DOM) Differential output voltage(dominant) See Figure 7-1  and Figure 7-2 ,TXD = 0 V, 45 Ω ≤ RL ≤ 70 Ω, and CL = open 1.4 3.3 V
Differential output voltage(dominant) See Figure 7-1  and Figure 7-2 ,TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, and CL = open 1.5 3.0 V
Differential output voltage(dominant) See Figure 7-1  and Figure 7-2 ,TXD = 0 V,  RL = 2240 Ω, and CL = open 1.5 5.0 V
VOD(REC) Differential output voltage(recessive) See Figure 7-1  and Figure 7-2 ,TXD = VCC1, RL = 60 Ω, and CL = open -120.0 12.0 mV
Differential output voltage(recessive) See Figure 7-1  and Figure 7-2 ,TXD = VCC1, RL = open, and CL = open -50.0 50.0 mV
VSYM_DC Output symmetry (VCC2 - VO(CANH) - VO(CANL)) See Figure 7-1  and Figure 7-2 ,RL = 60 Ω and CL = open -400.0 400.0 mV
IOS(SS_DOM) Short circuit current steady state output current, dominant See Figure 7-8 , -15 V < CANH < 40 V, CANL = open, and TXD = 0V -115.0   mA
See Figure 7-8 , -15 V < CANL < 40 V, CANH = open, and TXD = 0V   115.0 mA
IOS(SS_REC) Short circuit current steady state output current, recessive See Figure 7-8 , -27 V < VBUS < 32 V, VBUS = CANH = CANL, and TXD = VCC1 -5.0 5.0 mA
RECEIVER ELECTRICAL CHARACTERISTICS
VIT Differential input threshold voltage See Figure 7-4 and Table 7-1 , -12 V ≤ VCM ≤ 12 V 500.0 900.0 mV
VHYS Hysteresis voltage for differential input threshold See Figure 7-4 and Table 7-1 , -12 V ≤ VCM ≤ 12 V 100 mV
VDIFF(DOM) Dominant state differential input voltage range See Figure 7-4 and Table 7-1 , -12 V ≤ VCM ≤ 12 V 0.9 9 V
VDIFF(REC) Recessive state differential input voltage range See Figure 7-4 and Table 7-1 , -12 V ≤ VCM ≤ 12 V -4 0.5 V
VCM Input common mode range See Figure 7-4 and Table 7-1  -12 12 V
IOFF(LKG) power-off bus input leakage current CANH = CANL = 5V, VCC to GND via 0Ω and 47kΩ resistor 5 µA
CI Input capacitance to ground (CANH or CANL) TXD = VCC1   20 pF
CID Differential input capacitance TXD = VCC1   10 pF
RID Differential input resistance TXD = VCC1 ; -12 V ≤ VCM ≤ +12 V ; RID = RCAN_H + RCAN_L 40 90 kΩ
RIN Input resistance (CANH or CANL) TXD = VCC1 ; -12 V ≤ VCM ≤ +12 V ; RCAN_H or RCAN_L = Δ V / Δ I 20 45 kΩ
RIN(M) Input resistance matching: (1 - RIN(CANH)/RIN(CANL)) x 100% VCANH = VCANL = 5 V -1 1 %
THERMAL SHUTDOWN
TTSD Thermal shutdown temperature 190 ℃
TTSD_HYST Thermal shutdown hysteresis 8 ℃
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