The TPS7A84A is designed for system applications where minimizing noise on the power-supply rail is critical to system performance. For example, the TPS7A84A can be used in a phase-locked loop (PLL)-based clocking circuit can be used for minimum phase noise, or in test and measurement systems where even small power-supply noise fluctuations reduce system dynamic range.

LDO noise is defined as the internally-generated intrinsic noise created by the semiconductor circuits alone. This noise is the sum of various types of noise (such as shot noise associated with current-through-pin junctions, thermal noise caused by thermal agitation of charge carriers, flicker noise, or 1/f noise and dominates at lower frequencies as a function of 1/f). Figure 8-7 shows a simplified output voltage noise density plot versus frequency.

Figure 8-7 Output Voltage Noise Diagram

For further details, see the How to Measure LDO Noise white paper.