HGATE and OUT comprises of Load disconnect switch control stage. Connect the Source of the external MOSFET to OUT and Gate to HGATE.

Before the HGATE driver is enabled, following conditions must be achieved:

• The EN/UVLO pin voltage must be greater than the specified input high voltage.
• The CAP to VS voltage must be greater than the undervoltage lockout voltage.

• Voltage at Vs pin must be greater than Vs POR Rising thershold.

If the above conditions are not achieved, then the HGATE pin is internally connected to the OUT pin, assuring that the external MOSFET is disabled.

For Inrush Current limiting, connect C_dVdT capacitor and R₁ as shown in Figure 8-3.

The C_dVdT capacitor is required for slowing down the HGATE voltage ramp during power up for inrush current limiting. Use Equation 2 to calculate C_dVdT capacitance value .

where I_{HATE_DRV} is 55 μA (typ), I_INRUSH is the inrush current and C_OUT is the output load capacitance. An extra resistor, R₁, in series with the C_dVdT capacitor improves the turn off time.

For Load disconnect switch only designs, configure the LM74810-Q1 as shown in Figure 8-4