ZHCSLC3B
may 2020 – april 2023
TPD3S713-Q1
,
TPD3S713A-Q1
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
FAULT Response
8.3.2
Cable Compensation
8.3.2.1
Design Procedure
8.3.3
DP and DM Protection
8.3.4
VBUS OVP Protection
8.3.5
Output and DP or DM Discharge
8.3.6
Overcurrent Protection
8.3.7
Undervoltage Lockout
8.3.8
Thermal Sensing
8.3.9
Current-Limit Setting
8.4
Device Functional Modes
8.4.1
Device Truth Table (TT)
8.4.2
Client Mode
8.4.3
High-Bandwidth Data-Line Switch
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Input Capacitance
9.2.2.2
Output Capacitance
9.2.2.3
BIAS Capacitance
9.2.2.4
Output and BIAS TVS
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
接收文档更新通知
10.3
支持资源
10.4
Trademarks
10.5
静电放电警告
10.6
术语表
11
Mechanical, Packaging, and Orderable Information
7
Parameter Measurement Information
Figure 7-1
Short-to-Battery System Test Setup
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