ZHCSLJ5D February 2022 – March 2023 TIOL112 , TIOL1123 , TIOL1125
PRODUCTION DATA
The TIOL1123 and TIOL1125 each have an integrated linear voltage regulator (LDO) which can supply power to external components. The voltage regulator is specified for L+ voltages in the range of 7 V to 36 V with respect to L-. The LDO is capable of delivering up to 20 mA.
In the DSBGA (YAH) package, TIOL1123L offers pin-configurable LDO output via VSEL pin. When VSEL is connected to GND, VCC_OUT is configured to provide a 5-V output. When VSEL is left floating, VCC_OUT provides a 3.3-V output.
| VSEL pin connection | VCC_OUT |
|---|---|
| Connected to L- | 5 V |
| Floating | 3.3 V |
The LDO is designed to be stable with standard ceramic capacitors with values of 1 μF or larger at the output. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over temperature. Maximum ESR should be less than 1 Ω. With tolerance and dc bias effects, the minimum capacitance for stability is 1 μF.
The voltage regulator has an internal 35-mA current limit to protect against initial start-up inrush current due to large decoupling capacitors and accidental short circuit conditions.