米6体育平台手机版

ZHCSLY5A August 2020 – July 2021 TPS65994AD

PRODUCTION DATA

1 特性
2 应用
3 说明
4 Revision History
5 Pin Configuration and Functions
6 Specifications
7 Parameter Measurement Information
8 Detailed Description
9 Application and Implementation
1. 9.1 Application Information
2. 9.2 Typical Application
  1. 9.2.1 Type-C VBUS Design Considerations
  2. 9.2.2 Notebook Design Supporting PD Charging
    1. 9.2.2.1 USB and DisplayPort Notebook Supporting PD Charging
      1. 9.2.2.1.1 Design Requirements
      2. 9.2.2.1.2 Detailed Design Procedure
        
        9.2.2.1.2.1 USB Power Delivery Source Capabilities
        
        9.2.2.1.2.2 USB Power Delivery Sink Capabilities
        
        9.2.2.1.2.3 USB and DisplayPort Supported Data Modes
        
        9.2.2.1.2.4 TUSB1046 Super Speed Mux GPIO Control
    2. 9.2.2.2 Thunderbolt Notebook Supporting PD Charging
      1. 9.2.2.2.1 Design Requirements
      2. 9.2.2.2.2 Detailed Design Procedure
        
        9.2.2.2.2.1 USB Power Delivery Source Capabilities
        
        9.2.2.2.2.2 USB Power Delivery Sink Capabilities
        
        9.2.2.2.2.3 Thunderbolt Supported Data Modes
        
        9.2.2.2.2.4 I2C Design Requirements
        
        9.2.2.2.2.5 TS3DS10224 SBU Mux for AUX and LSTX/RX
10Power Supply Recommendations
11Layout
12Device and Documentation Support
13Mechanical, Packaging, and Orderable Information
1. 13.1 Package Option Addendum
  1. 13.1.1 Tape and Reel Information

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Input voltage range ⁽²⁾	PP5V	–0.3	6	V
	VIN_3V3	–0.3	4
	ADCIN1, ADCIN2	–0.3	4
	VSYS, PA_VBUS, PB_VBUS ⁽⁴⁾	–0.3	28	V
	PA_CC1, PA_CC2, PB_CC1, PB_CC2	–0.5	6
	GPIO0-GPIO9, I2C_EC_IRQ, I2C2s_IRQ, I2C3m_IRQ	-0.3	6
	I2C_EC_SDA, I2C_EC_SCL,I2C2s_SDA, I2C2s_SCL, I2C3m_SDA, I2C3m_SCL	–0.3	4
Output voltage range ⁽²⁾	LDO_1V5⁽³⁾	–0.3	2	V
Output voltage range ⁽²⁾	LDO_3V3⁽³⁾	–0.3	4	V
Output voltage range ⁽²⁾	PA_GATE_VBUS, PA_GATE_VSYS, PB_GATE_VBUS, PB_GATE_VSYS ⁽³⁾	–0.3	40	V
V_GS	V_{Px_GATE_VBUS} - V_{Px_VBUS}, V_{Px_GATE_SYS} - V_VSYS	–0.5	12	V
Source current	Source or sink current PA_VBUS, PB_VBUS		internally limited	A
	Positive source current on PA_CC1, PA_CC2, PB_CC1, PB_CC2		1
	Positive sink current on PA_CC1, PA_CC2, PB_CC1, PB_CC2 while VCONN switch is enabled		1
	GPIO0-GPIO9		0.005
	positive sink current for I2C_EC_SDA, I2C_EC_SCL, I2C2s_SDA, I2C2s_SCL, I2C3m_SDA, I2C3m_SCL,		internally limited
	positive source current for LDO_3V3, LDO_1V5		internally limited
T_J Operating junction temperature		–40	175	°C
T_STG Storage temperature		–55	150	°C

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network GND. Connect the GND pin directly to the GND plane of the board.

(3) Do not apply voltage to these pins.

(4) For Px_VBUS a TVS with a break down voltage falling between the Recommended max and the Abs max value is recommended such as TVS2200. For Px_VBUS a Schottky diode is recommended to ensure the MIN voltage is not violated.