ZHCSLY9A October   2020  – December 2020 LM7310

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8.     14
    9. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Reverse Polarity Protection
      2. 7.3.2 Undervoltage Protection (UVLO & UVP)
      3. 7.3.3 Overvoltage Lockout (OVLO)
      4. 7.3.4 Inrush Current control and Fast-trip
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
        2. 7.3.4.2 Fast-Trip During Steady State
      5. 7.3.5 Analog Load Current Monitor Output
      6. 7.3.6 Reverse Current Protection
      7. 7.3.7 Overtemperature Protection (OTP)
      8. 7.3.8 Fault Response
      9. 7.3.9 Power Good Indication (PG)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Single Device, Self-Controlled
      1. 8.2.1 Typical Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting Undervoltage and Overvoltage Thresholds
          2. 8.2.1.2.2 Setting Output Voltage Rise Time (tR)
          3. 8.2.1.2.3 Setting Power Good Assertion Threshold
          4. 8.2.1.2.4 Setting Analog Current Monitor Voltage (IMON) Range
        3. 8.2.1.3 Application Curves
    3. 8.3 Active ORing
    4. 8.4 Priority Power MUXing
    5. 8.5 USB PD Port Protection
    6. 8.6 Parallel Operation
  9. 9 Power Supply Recommendations
    1. 9.1 Transient Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

GUID-20201214-CA0I-GSG4-VWCS-HX4W22XNFCCM-low.gif Figure 5-1 LM73100 RPW Package 10-Pin QFN Top View
Table 5-1 Pin Functions
PINTYPEDESCRIPTION
NAMENO.
EN/UVLO

1

Analog InputActive High Enable for the device. A Resistor Divider on this pin from input supply to GND can be used to adjust the Undervoltage Lockout threshold. Do not leave floating. Refer to Section 7.3.2 for more details.

OVLO

2

Analog InputA Resistor Divider on this pin from supply to GND can be used to adjust the Overvoltage Lockout threshold. This pin can also be used as an Active Low Enable for the device. Do not leave floating. Refer to Section 7.3.3 for more details.

PG

3

Digital OutputPower Good indication. This is an Open Drain signal which is asserted High when the internal powerpath is fully turned ON and PGTH input exceeds a certain threshold. Refer to Section 7.3.9 for more details.

PGTH

4

Analog InputPower Good Threshold. Refer to Section 7.3.9 for more details.

IN

5

Power

Power Input.

OUT

6

Power

Power Output.

DVDT

7

Analog OutputA capacitor from this pin to GND sets the output turn on slew rate. Leave this pin floating for the fastest turn on slew rate. Refer to Section 7.3.4.1 for more details.

GND

8

Ground

This is the ground reference for all internal circuits and must be connected to system GND.

IMON

9

Analog Output

Analog load current monitor. The pin voltage can be used to monitor the output load current. An external resistor from this pin to ground sets the current monitor gain. Recommended to connect external clamp to limit the voltage below abs max rating in case of large current spikes. Connect to ground if not used. Do not leave floating. Refer to Section 7.3.5 for more details.

DNC

10

X

Internal test pin. Do not connect anything on this pin.
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