ZHCSLZ8A September 2020 – August 2021 TPS65988DK
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SDA AND SCL COMMON CHARACTERISTICS | ||||||
ILEAK | Input leakage current | Voltage on Pin = LDO_3V3 | –3 | 3 | µA | |
VOL | SDA output low voltage | IOL = 3 mA, LDO_3V3 = 3.3 V | 0.4 | V | ||
IOL | SDA max output low current | VOL = 0.4 V | 3 | mA | ||
VOL = 0.6 V | 6 | mA | ||||
VIL | Input low signal | LDO_3V3 = 3.3 V | 0.99 | V | ||
LDO_1V8 = 1.8 V | 0.54 | V | ||||
VIH | Input high signal | LDO_3V3 = 3.3 V | 2.31 | V | ||
LDO_1V8 = 1.8 V | 1.3 | V | ||||
VHYS | Input hysteresis | LDO_3V3 = 3.3 V | 0.17 | V | ||
LDO_1V8 = 1.8 V | 0.09 | V | ||||
tSP | I2C pulse width suppressed | 50 | ns | |||
CI | Pin capacitance | 10 | pF | |||
SDA AND SCL STANDARD MODE CHARACTERISTICS | ||||||
ƒSCL | I2C clock frequency | 0 | 100 | kHz | ||
tHIGH | I2C clock high time | 4 | µs | |||
tLOW | I2C clock low time | 4.7 | µs | |||
tSU;DAT | I2C serial data setup time | 250 | ns | |||
tHD;DAT | I2C serial data hold time | 0 | ns | |||
tVD;DAT | I2C valid data time | SCL low to SDA output valid | 3.45 | µs | ||
tVD;ACK | I2C valid data time of ACK condition | ACK signal from SCL low to SDA (out) low | 3.45 | µs | ||
tOCF | I2C output fall time | 10-pF to 400-pF bus | 250 | ns | ||
tBUF | I2C bus free time between stop and start | 4.7 | µs | |||
tSU;STA | I2C start or repeated Start condition setup time | 4.7 | µs | |||
tHD;STA | I2C Start or repeated Start condition hold time | 4 | µs | |||
tSU;STO | I2C Stop condition setup time | 4 | µs | |||
SDA AND SCL FAST MODE CHARACTERISTICS | ||||||
ƒSCL | I2C clock frequency | Configured as Slave | 0 | 400 | kHz | |
ƒSCL_MASTER | I2C clock frequency | Configured as Master | 0 | 320 | 400 | kHz |
tHIGH | I2C clock high time | 0.6 | µs | |||
tLOW | I2C clock low time | 1.3 | µs | |||
tSU;DAT | I2C serial data setup time | 100 | ns | |||
tHD;DAT | I2C serial data hold time | 0 | ns | |||
tVD;DAT | I2C Valid data time | SCL low to SDA output valid | 0.9 | µs | ||
tVD;ACK | I2C Valid data time of ACK condition | ACK signal from SCL low to SDA (out) low | 0.9 | µs | ||
tOCF | I2C output fall time | 10-pF to 40-pF bus, VDD = 3.3 V | 12 | 250 | ns | |
10-pF to 400-pF bus, VDD = 1.8 V | 6.5 | 250 | ns | |||
tBUF | I2C bus free time between stop and start | 1.3 | µs | |||
tSU;STA | I2C start or repeated Start condition setup time | 0.6 | µs | |||
tHD;STA | I2C Start or repeated Start condition hold time | 0.6 | µs | |||
tSU;STO | I2C Stop condition setup time | 0.6 | µs |