ZHCSM06C december 2020 – may 2023 TPS272C45
PRODUCTION DATA
All timing diagrams assume that the SEL pin is low to measure channel one behavior on the SNS pin. DIA_EN and SEL pins have no effect on the FLT (versions A, B, C) or FLT1, FLT2 (version D) pin output.
The LATCH, SEL, DIA_EN, and ENx pins are controlled by the user. The timing diagrams represent possible use-cases.
Figure 9-12 shows the device fault reporting behavior in the event of a fault in channel 2 (only) with LATCH and SEL pin set to LO. As shown, the fault signaling is deactivated when EN is toggled (in this case from HI to LO to HI). The faulted channel can be determined by toggling the EN pin with a short pulse (less than 10-us wide) that does not affect the output of the channel.
Figure 9-13 shows the device fault reporting behavior in the event of an overcurrent fault when EN goes high. As shown, the fault signaling is active only after the initial inrush current limit phase is complete.
Figure 9-14 shows the device fault and retry behavior when there is a slow creep into an overcurrent event. As shown, the switch clamps the current until it hits thermal shutdown, and then the device remains latched off until the LATCH pin is low.
Figure 9-15 shows the behavior with LATCH tied to GND; hence, the switch retries after the fault is cleared and tRETRY has expired.
When the switch retries after a shutdown event, the fault indication remains until VOUTx has risen to VVS – 1.8 V. After VOUTx has risen, the FLT output is reset and current sensing is available. If there is a short-to-ground and VOUT is not able to rise, the SNS fault indication remains indefinitely. Figure 9-16 illustrates auto-retry behavior and provides a zoomed-in view of the fault indication during retry.
Figure 9-16 assumes that tRETRY has expired by the time that TJ reaches the hysteresis threshold.
LATCH = LO and DIA_EN = HI