ZHCSM11A October   2020  – May 2024 TMUX1575

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Dynamic Characteristics
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  IPOFF Leakage Current
    5. 6.5  Transition Time
    6. 6.6  tON (EN) and tOFF (EN) Time
    7. 6.7  Break-Before-Make Delay
    8. 6.8  Charge Injection
    9. 6.9  Off Isolation
    10. 6.10 Channel-to-Channel Crosstalk
    11. 6.11 Bandwidth
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Beyond Supply Operation
      3. 7.3.3 1.2V Logic Compatible Inputs
      4. 7.3.4 Powered-off Protection
      5. 7.3.5 Fail-Safe Logic
      6. 7.3.6 Integrated Pull-Down Resistors
    4. 7.4 Device Functional Modes
      1. 7.4.1 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
    2. 8.2 Power Supply Recommendations
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

4 Pin Configuration and Functions

TMUX1575 YCJ Package16-Pin DSBGA (Top View)Figure 4-1 YCJ Package16-Pin DSBGA (Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION(2)
NO. NAME
A1 S2A I/O Source pin 2A. Can be an input or output.
A2 S1A I/O Source pin 1A. Can be an input or output.
A3 S1B I/O Source pin 1B. Can be an input or output.
A4 S2B I/O Source pin 2B. Can be an input or output.
B1 S3A I/O Source pin 3A. Can be an input or output.
B2 VDD P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.
B3 EN I Active high enable: Internal 6 MΩ pull-down to GND.
B4 S3B I/O Source pin 3B. Can be an input or output.
C1 S4A I/O Source pin 4A. Can be an input or output.
C2 SEL I Select pin: controls state of switches according to Table 7-1. Internal 6 MΩ pull-down to GND.
C3 GND P Ground (0V) reference
C4 S4B I/O Source pin 4B. Can be an input or output.
D1 D1 I/O Drain pin 1. Can be an input or output.
D2 D2 I/O Drain pin 2. Can be an input or output.
D3 D3 I/O Drain pin 3. Can be an input or output.
D4 D4 I/O Drain pin 4. Can be an input or output.
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 7.4 for what to do with unused pins.
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