Applications operating with low input frequencies (such as DC to 2 MHz) typically are less sensitive to performance degradation due to clock jitter. The internal ADC aperture jitter improves with faster rise and fall times (i.e. square wave vs sine wave). Table 9-4 provides an overview of the estimated SNR performance of the ADC3660 based on different amounts of jitter of the external clock source. The SNR is estimated based on ADC3660 thermal noise of 82 dBFS and input signal at -1dBFS in decimation bypass mode.

Termination of the clock input should be considered for long clock traces.