The TLC6C5748-Q1 can adjust the brightness of each output channel using a pulse width modulation (PWM) control scheme. The architecture of 16 bits per channel results in 65,536 brightness steps, from 0% up to 100% brightness.

The PWM operation for OUTn is controlled by a 16-bit grayscale (GS) counter. The GS counter increments on each GS reference clock (GSCLK) rising edge. The GS counter resets to 0000h when the LAT rising signal for a GS data write is input with the display timing reset mode enabled.

The TLC6C5748-Q1 has two types of PWM control: conventional PWM control and enhanced spectrum (ES) PWM control. The conventional PWM control can be selected when the ESPWM bit in the control data latch is 0. The ES PWM control is selected when the ESPWM bit is 1. The conventional PWM control should be selected for multiplexing a drive. The ES-PWM control should be selected for a static drive.

The on-time (t_{OUT_ON}) of each output (OUTn) can be calculated by Equation 2.

where:

• t_GSCLK = one GS clock period,
• GSXn = the programmed GS value for OUTXn (GSXn = 0d to 65535d),
• X = R, G, or B for the red, green, or blue color group, and
• n = 0 to 15.

Table 8-11 summarizes the GS data values versus the output on-time duty cycle. When the device powers up, all OUTXn are forced off, the GS counter initializes to 0000h, and the status remains the same until GS data are written. After that, each OUTXn on and off status can be controlled by GS data and GSCLK.