ZHCSMA7D January 2022 – April 2024 TPS4811-Q1
PRODUCTION DATA
The TPS4811x-Q1 withstands output reverse voltages down to -30 V. With INP low, PD is pulled low to SRC and keeps the external FET OFF even with output (SRC) voltage at negative levels preventing high current flow and protecting the main FET. Refer to Figure 8-14 and Figure 8-15 for test waveforms.