ZHCSMA7D January 2022 – April 2024 TPS4811-Q1
PRODUCTION DATA
The CTMR programs the over current protection delay (tOC) and auto-retry time (tRETRY). Once the voltage across CS+ and CS– exceeds the set point, the CTMR starts charging with 80-µA pull-up current. After the CTMR charges up to V(TMR_FLT), FLT asserts low providing warning on impending FET turn OFF. After CTMR charges to V(TMR_OC), PD pulls low to SRC turning OFF the FET. Post this event, the auto-retry behavior starts. The CTMR capacitor starts discharging with 2.5-uA pulldown current. After the voltage reaches V(TMR_LOW) level, the capacitor starts charging with 2.5-uA pullup. After 32 charging-discharging cycles of CTMR the FET turns ON back and FLT de-asserts
Use Equation 7 to calculate the CTMR capacitor to be connected across TMR and GND.
Where, ITMR is internal pull-up current of 80-µA, tOC is desired overcurrent response time.
The fastest tOC is < 6 µs with no CTMR cap connected.
tRETRY = 22.7 × 106 × CTMR
If the overcurrent pulse duration is below tOC then the FET remains ON and CTMR gets discharged using internal pull down switch.