ZHCSMK3B November 2020 – November 2021 ADS131B04-Q1
PRODUCTION DATA
The ADS131B04-Q1 uses a delta-sigma (ΔΣ) modulator to convert the analog input voltage to a one's density modulated digital bit-stream. The ΔΣ modulator oversamples the input voltage at a frequency many times greater than the output data rate. The modulator frequency, fMOD, of the ADS131B04-Q1 is equal to half the main clock frequency (that is, fMOD = fMCLK / 2).
The output of the modulator is fed back to the modulator input through a digital-to-analog converter (DAC) as a means of error correction. This feedback mechanism shapes the modulator quantization noise in the frequency domain to make the noise more dense at higher frequencies and less dense in the band of interest. The digital decimation filter following the ΔΣ modulator significantly attenuates the out-of-band modulator quantization noise, allowing the device to provide excellent dynamic range.