ZHCSMZ3A December 2020 – June 2021 PCM1820 , PCM1821
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ADC CONFIGURATION | |||||||
AC input impedance (PCM1820) | Input pins INxP or INxM | 2.5 | kΩ | ||||
AC input impedance (PCM1821) | 10 | kΩ | |||||
PCM1820: ADC PERFORMANCE FOR LINE, MICROPHONE INPUT RECORDING : AVDD 3.3-V OPERATION | |||||||
Differential input full-scale AC signal voltage | AC-coupled input | 2 | VRMS | ||||
SNR | Signal-to-noise ratio, A-weighted(1) (2) | IN1 differential input selected and AC signal shorted to ground, DRE enabled (DRE_LVL = –36 dB, DRE_MAXGAIN = 24 dB) |
115 | 122 | dB | ||
IN1 differential input selected and AC signal shorted to ground, DRE disabled | 106 | 112 | |||||
DR | Dynamic range, A-weighted(2) | IN1 differential input selected and –60-dB full-scale AC signal input, DRE enabled (DRE_LVL = –36 dB, DRE_MAXGAIN = 24 dB) | 123 | dB | |||
IN1 differential input selected and –60-dB full-scale AC signal input, DRE disabled | 113 | ||||||
THD+N | Total harmonic distortion(2) (3) | IN1 differential input selected and –1-dB full-scale AC signal input, DRE enabled (DRE_LVL = –36 dB, DRE_MAXGAIN = 24 dB) |
–95 | –80 | dB | ||
IN1 differential input selected and –1-dB full-scale AC signal input, DRE disabled | –95 | ||||||
PCM1821: ADC PERFORMANCE FOR LINE, MICROPHONE INPUT RECORDING : AVDD 3.3-V OPERATION | |||||||
Differential input full-scale AC signal voltage | AC-coupled input | 2 | VRMS | ||||
SNR | Signal-to-noise ratio, A-weighted(1) (2) | IN1 differential input selected and AC signal shorted to ground | 100 | 106 | dB | ||
DR | Dynamic range, A-weighted(1) (2) | IN1 differential input selected and –60-dB full-scale AC signal input | 106 | dB | |||
THD+N | Total harmonic distortion(2) (3) | IN1 differential input selected and –1-dB full-scale AC signal input | –95 | dB | |||
ADC OTHER PARAMETERS | |||||||
Output data sample rate | 7.35 | 192 | kHz | ||||
Output data sample word length | 32 | Bits | |||||
Interchannel isolation | –1-dB full-scale AC-signal input to non measurement channel | –124 | dB | ||||
Interchannel gain mismatch | –6-dB full-scale AC-signal input | 0.1 | dB | ||||
Gain drift(4) | Across temperature range -40°C to 125°C | 40.5 | ppm/°C | ||||
Interchannel phase mismatch | 1-kHz sinusoidal signal | 0.02 | Degrees | ||||
Phase drift(5) | 1-kHz sinusoidal signal, across temperature range -40°C to 125°C | 0.0005 | Degrees/°C | ||||
PSRR | Power-supply rejection ratio | 100-mVPP, 1-kHz sinusoidal signal on AVDD, differential input selected, 0-dB channel gain | 102 | dB | |||
PCM1820: CMRR | Common-mode rejection ratio | Differential microphone input selected, 100-mVPP, 1-kHz signal on both pins and measure level at output | 45 | dB | |||
PCM1821: CMRR | Common-mode rejection ratio | Differential microphone input selected, 100-mVPP, 1-kHz signal on both pins and measure level at output | 60 | dB | |||
DIGITAL I/O | |||||||
VIL | Low-level digital input logic voltage threshold | All digital pins except FMT0, IOVDD 1.8-V operation | –0.3 | 0.30 × IOVDD | V | ||
All digital pins except FMT0, IOVDD 3.3-V operation | –0.3 | 0.8 | |||||
FMT0 Pin | –0.3 | 0.8 | V | ||||
VIH | High-level digital input logic voltage threshold | All digital pins except FMT0, IOVDD 1.8-V operation | 0.7 × IOVDD | IOVDD + 0.3 | V | ||
All digital pins except FMT0, IOVDD 3.3-V operation | 2.1 | IOVDD + 0.3 | |||||
FMT0 Pin | 2.1 | AVDD + 0.3 | V | ||||
VOL | Low-level digital output voltage | All digital pins, IOL = –2 mA, IOVDD 1.8-V operation | 0.45 | V | |||
All digital pins, IOL = –2 mA, IOVDD 3.3-V operation | 0.4 | ||||||
VOH | High-level digital output voltage | All digital pins, IOH = 2 mA, IOVDD 1.8-V operation | IOVDD – 0.45 | V | |||
All digital pins, IOH = 2 mA, IOVDD 3.3-V operation | 2.4 | ||||||
IIH | Input logic-high leakage for digital inputs | All digital pins, input = IOVDD | –5 | 0.1 | 5 | µA | |
IIL | Input logic-low leakage for digital inputs | All digital pins, input = 0 V | –5 | 0.1 | 5 | µA | |
CIN | Input capacitance for digital inputs | All digital pins | 5 | pF | |||
RPD | Pulldown resistance for digital I/O pins when asserted on | 20 | kΩ | ||||
TYPICAL SUPPLY CURRENT CONSUMPTION | |||||||
IAVDD | Current consumption with all Clocks disabled | AVDD = 3.3 V, internal AREG | 0.5 | mA | |||
IIOVDD | All external clocks stopped, IOVDD = 3.3 V | 0.5 | µA | ||||
IIOVDD | All external clocks stopped, IOVDD = 1.8 V | 0.3 | |||||
IAVDD | Current consumption with ADC 2-channel operating at fS 16-kHz, BCLK = 256 × fS and DRE disabled | AVDD = 3.3 V, internal AREG | 11.9 | mA | |||
IIOVDD | IOVDD = 3.3 V | 0.05 | |||||
IIOVDD | IOVDD = 1.8 V | 0.02 | |||||
IAVDD | Current consumption with ADC 2-channel operating at fS 48-kHz, BCLK = 256 × fS and DRE disabled | AVDD = 3.3 V, internal AREG | 12.9 | mA | |||
IIOVDD | IOVDD = 3.3 V | 0.1 | |||||
IIOVDD | IOVDD = 1.8 V | 0.05 | |||||
IAVDD | Current consumption with ADC 2-channel operating at fS 48-kHz, BCLK = 256 × fS and DRE enabled | AVDD = 3.3 V, internal AREG | 14 | mA | |||
IIOVDD | IOVDD = 3.3 V | 0.1 | |||||
IIOVDD | IOVDD = 1.8 V | 0.05 |