The IC is alive after the IN voltage ramps above UVLO (see Section 7.4.1), resets all logic and timers, and starts to perform the D+D– detection along with many of the continuous monitoring routines. The D+/D– detection typically take less than 100 ms, but can take as long as 600 ms if there is no activity on the D+ or D– lines which indicates the device transceiver nor an adaptor is present. Typically the input voltage quickly rises through the UVLO and sleep states where the IC declares power good, starts the qualification charge at 100 mA, finishes the USB detection routine, sets the input current limit threshold base on the source detected (ISET=adaptor or 100mA=USB), starts the safety timer, and enables the CHG pin. See Figure 7-3.