ZHCSNG6 November 2021 UCC28781-Q1
PRODUCTION DATA
The over-power protection (OPP) allows operation in an over-power condition for a limited amount of time, so the UCC28781-Q1 can support a power stage design with temporary peak power requirements. As shown in Figure 7-43, when VCST is higher than the threshold voltage of the OPP curve (VCST(OPP)), a 160-ms timer starts. For the auto-recovery mode, if VCST remains higher than VCST(OPP) continuously for 160 ms, the 1.5-s timer starts and the controller stays in fault state without switching. This long recovery time reduces the average current during a sustained over-power event. The system benefits includes the reduction of thermal stress in high density adapters and the protection of its output cable.
The OPP function uses IVSL as a line feed-forward signal to vary VCST(OPP) depending on VBULK, in order to make the OPP trigger point constant over a wide line voltage range. The UCC28781-Q1 allows programmability of the OPP curve by adding a line-compensation offset voltage on the CS pin through a resistor (ROPP) connected between the CS pin and current-sense resistor (RCS). An internal current source flowing out of CS pin creates the offset voltage on ROPP. This current level is equal to IVSL divided by a constant gain of KLC. As ROPP increases, the OPP trigger point becomes lower at high line, so lower peak magnetizing current is allowed to run continuously.
The OPP function uses VVS as an output voltage feed-forward signal to modify the line-dependent VCST(OPP) curve into the two different sets, such that the OPP trigger point can be more consistent across a wide output voltage range. The higher OPP threshold under VVS > 2.5 V contains two piece-wise linear regions, and the lower OPP threshold under VVS < 2.4 V contains one piece-wise linear region.
The highest threshold of OPP curve (VCST(OPP1)) of 0.6 V helps to determine RCS value at VBULK(MIN) .
where PO(OPP) is the output power that triggers OPP, and tD(CST) is the sum of all delays in the peak current loop which contributes additional peak current overshoot. tD(CST) consists of propagation delay of the low-side driver, current sense filter delay (ROPP x CCS), internal CS comparator delay (tD(CS)), and nonlinear capacitance delay of QL. After RCS is determined, ROPP can be adjusted to keep a similar OPP point at highest line. Note that setting the OPP trigger point too far away from the full power may introduce more challenge on the thermal design, since the converter runs continuously with more power as long as the corresponding peak current is slightly less than OPP threshold.