The most important layout
guideline is to minimize the VCC-GND-bypass capacitor loop. Because this
loop carries all the switching current, it is important to have a low ESL
bypass capacitor between VCC and GND, with the minimum loop. Refer to Layout Example for how to layout the bypass capacitor on VCC to
GND.
Return all control signals to
GND pin through a separated plane. Avoid sharing path between the signal
ground and the power ground. Use a short trace to connect GND pin to the
thermal pad.
Separate the power stage
components and signal component to minimize the coupling between these
components
Short VREG-GND-decoupling
capacitor loop is recommended. A low ESL decoupling capacitor between VREG
and GND is needed to ensure stable operation of the internal linear
regulator.
Add decoupling capacitors on
RT and DT/OC pin to improve the noise immunity if it is needed. Refer to
Section 7.3
for recommended maximum capacitor values.
Short SYNC pin to GND when
external synchronization is not used.
Minimize the current loop
with high di/dt and minimize the copper area of the switch-node with high
dv/dt.
Other general power supply design layout guidelines.
The secondary side of the LLC
converter is often connected with the high dv/dt node in the end equipment.
In these cases, it is recommended to minimize the secondary-side copper
area.