Note that when supplying power from VDDM, that is when I_AUX > 0 mA, additional voltage ripple is present on the VDDM rail. For a given R_PXFR setting, this ripple can be reduced by applying additional capacitance from VDDM to VSSS. For this design example, the ripple on VDDM, VDDM_ripple, computed in the calculator tool is 75 mV.

It is possible to reduce the VDDM_ripple with the addition of capacitance while still maintaining the original VDDH_droop = 0.5 V. For example, applying C_DIV1 = 330 nF and C_DIV2 = 680 nF in the calculator tool, reduces VDDM_ripple to 52 mV, while still maintaining VDDH_droop < 0.5 V. Of course, this additional capacitance leads to increased t_START times.