ZHCSPC3A May 2021 – November 2021 TCAN11623-Q1 , TCAN11625-Q1
PRODUCTION DATA
Standby mode is a low power mode of the TCAN1162x-Q1 where the CAN transceiver is placed in the CAN autonomous inactive state by asserting the nSLP pin low. In this mode the TS pin is driven low, the CAN transmitter and receiver are switched off, the bus pins are biased to ground, and the transceiver cannot send or receive data. While in standby mode the low power receiver actively monitors the CAN bus for a valid wake-up pattern. If a valid wake-up pattern is received the CAN bus pins transition to the CAN autonomous active state where CANH and CANL are internally biased to 2.5 V from the VSUP power rail. The reception of a valid wake-up pattern generates a wake-up request by the CAN transceiver by latching the RXD output pin low. The WAKE pin circuitry is active in standby mode and monitors the WAKE pin for either a high-to-low or low-to-high transition. The INH pin is active in order to supply an enable to the system power supply.
The RXD output pin is asserted low while in standby mode if the a wake event or a fault is detected. Note that a POR counts as a wake event and will also cause RXD to latch low.
In standby mode a fail-safe timer, tINACTIVE, is enabled. The tINACTIVE timer add an additional layer of protection by requiring the system controller to configure the TCAN1162x-Q1 to normal mode before it expires. This feature forces the TCAN1162x-Q1 to transition to its lowest power mode, sleep mode, if the processor does not come up properly.
The TCAN11625 internal regulator, VCCOUT, is active in standby mode.
The TCAN11623 internal regulators, VFLT and VLDO3, are active in standby mode.
Standby mode is not the lowest power mode of the device since the INH terminal and internal regulators are active. This allows the rest of the system to operate normally.