OPT4001 supports I²C burst read mode which helps in minimizing the number of transactions on the bus for efficient data transfer from the device to the controller.

Before considering the burst mode, a regular I²C read transaction involves an I²C write operation to the device read pointer, followed by the actual I²C read operation. If the output registers and FIFO registers which are in continuous locations, are writing the register pointer every 2 bytes, this takes up several clock cycles. With the burst mode enabled, the read pointer address is auto incremented after every register read (2 bytes), eliminating the need write operations to set the pointer for subsequent register reads.

Burst mode can be enabled by setting the register I2C_BURST. When a STOP command is issued the pointer resets to the original register address before the auto-increments.