ZHCSPZ0A february 2022 – june 2023 LMK1D1208I
PRODUCTION DATA
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | LMK1D1208I | ||
DIFFERENTIAL/SINGLE-ENDED CLOCK INPUT | |||
IN0_P, IN0_N | 12, 13 | I | Primary: Differential input pair or single-ended input |
IN1_P, IN1_N | 8, 9 | I | Secondary: Differential input pair or single-ended input. |
I2C PROGRAMMING | |||
SDA | 5 | I/O | I2C data |
SCL | 6 | I | I2C clock |
IDX0 | 15 | I,S,PU | I2C address bit[0]. This is a 2-level input that is decoded in conjunction with pin 15 to set the I2C address. It has internal 670-kΩ pullup. |
IDX1 | 16 | I,S, PU | I2C address bit[1]. This is a 2-level input that is decoded in conjunction with pin 16 to set the I2C address. It has internal 670-kΩ pullup. |
BIAS VOLTAGE OUTPUT | |||
VAC_REF0, VAC_REF1 | 14, 10 | O | Bias voltage output for capacitive coupled inputs. If used, TI recommends using a 0.1-µF capacitor to GND on this pin. |
DIFFERENTIAL CLOCK OUTPUT | |||
OUT0_P, OUT0_N | 18, 19 | O | Differential LVDS output pair number 0 |
OUT1_P, OUT1_N | 22, 23 | O | Differential LVDS output pair number 1 |
OUT2_P, OUT2_N | 24, 25 | O | Differential LVDS output pair number 2 |
OUT3_P, OUT3_N | 28, 29 | O | Differential LVDS output pair number 3 |
OUT4_P, OUT4_N | 32, 33 | O | Differential LVDS output pair number 4 |
OUT5_P, OUT5_N | 34, 35 | O | Differential LVDS output pair number 5 |
OUT6_P, OUT6_N | 38, 39 | O | Differential LVDS output pair number 6 |
OUT7_P, OUT7_N | 2, 3 | O | Differential LVDS output pair number 7 |
SUPPLY VOLTAGE | |||
VDD | 11, 20, 40 | P | Device power supply (1.8 V, 2.5 V, or 3.3 V) |
GROUND | |||
DAP | DAP | G | Die Attach Pad. Connect to the printed circuit board (PCB) ground plane for heat dissipation. |
NO CONNECT | |||
NC | 1, 4, 7, 17, 21, 26, 27, 30, 31, 36, 37 | — | No connection. Leave floating. |