Bank 0 and Bank 1 can choose between the two inputs to fanout four LVDS output pairs each. In the 2:1 input mux mode, each bank must select the same clock input to output eight identical clocks. With the dual bank mode, each bank can select a different clock input to distribute both inputs separately; this is analogous to having two 1:4 buffers. When operating in dual bank mode, TI recommends that Bank 0 not select IN1 and Bank 1 not select IN0 to avoid crosstalk and degraded performance.

The BANKx_IN_SEL register field configures this function described in Table 9-6. BANKx_IN_SEL is set by register 0x02 (R2). See R2 Register for more information on this register.