ZHCSSZ1E November   2010  – August 2023 ISO35T

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1.     Pin Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics: Driver
    10. 6.10 Electrical Characteristics: Receiver
    11. 6.11 Supply Current
    12. 6.12 Transformer Driver Characteristics
    13. 6.13 Switching Characteristics: Driver
    14. 6.14 Switching Characteristics: Receiver
    15. 6.15 Insulation Characteristics Curves
    16. 6.16 Typical Characteristics
  8. 7 Parameter Measurement Information
    1.     26
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
      1. 8.3.1 Device I/O Schematics
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Transient Voltages
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 静电放电警告
    5. 12.5 术语表
  14. 13Mechanical, Packaging, and Orderable Information

6.10 Electrical Characteristics: Receiver

All typical specs are at VCC1=3.3V, VCC2=5V, TA=27°C, (Min/Max specs are over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIT+ Positive-going input threshold voltage
IO = –8 mA
 		 –20 mV
VIT– Negative-going input threshold voltage
IO = 8 mA
 		 –200 mV
Vhys Input hysteresis (VIT+ – VIT–) 50 mV
VOH High-level output voltage VID = 200 mV, IO = -8 mA 2.4 V
VOL
Low-level output voltage

 VID = -200 mV, IO = 8 mA 0.4 V
IO(Z) Output high-impedance current
VO = 0 or VCC1, RE = VCC1		 –1 1 µA

IA or IB
 
Bus input current


VA or VB = 12 V, Other input at 0 V
 		 50 100 µA

VA or VB = 12 V, VCC = 0, Other input at 0 V
 		 60 100 µA

VA or VB = –7 V, Other input at 0 V
 		 -100 -40 µA

VA or VB = –7 V, VCC = 0, Other input at 0 V
 		 -100 -30 µA

IIH
 
High-level input current, RE
 
VIH = 2 V
 		 -10 10 µA

IIL
 
Low-level input current, RE
 
VIL = 0.8 V
 		 -10 10 µA
RID
Differential input resistance

Measured between A & B 96 kohm
CID
Differential input capacitance

VI = 0.4 sin (4E6πt) + 0.5 V
 		 15 pF
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