ZHCSU66J August   2001  – December 2023 UCC29002 , UCC39002

PRODUCTION DATA  

  1.   1
  2. 1特性
  3. 2应用
  4. 3说明
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Differential Current-Sense Amplifier (CS+, CS−, CSO)
      2. 6.3.2 Load-Share Bus Driver Amplifier (CSO, LS)
      3. 6.3.3 Load-Share Bus Receiver Amplifier (LS)
      4. 6.3.4 Error Amplifier (EAO)
      5. 6.3.5 Adjust Amplifier Output (ADJ)
      6. 6.3.6 Enable Function (CS+, CS−)
      7. 6.3.7 Fault Protection on LS Bus
      8. 6.3.8 Start-Up and Adjust Logic
      9. 6.3.9 Bias Input and Bias_OK Circuit (VDD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Start-Up Mode
      2. 6.4.2 Normal Running Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Disabled Mode
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Paralleling the Power Modules
    3. 7.3 Typical Application
      1. 7.3.1 Measuring the Voltage Loop of a Power Module
      2. 7.3.2 Detailed Design Procedure
        1. 7.3.2.1 The Shunt Resistor
        2. 7.3.2.2 The CSA Gain
        3. 7.3.2.3 Determining RADJ
        4. 7.3.2.4 Error Amplifier Compensation
      3. 7.3.3 Application Curve
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 接收文档更新通知
      1. 8.1.1 Documentation Support
    2. 8.2 Related Links
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. 9Revision History
  11.   Mechanical, Packaging, and Orderable Information

7.3.2.2 The CSA Gain

The gain of the current-sense amplifier (CSA) is set by the compensation components connected to the CS− and CSO pins of the load-share device. The maximum allowable voltage at CSO is limited by the internal saturation level of the CSA and must be at least 1.7V less than VDD as seen in Equation 4.

Equation 4. V C S O ( m a x ) < V V D D - 1.7   V

VCSO(max) can be targeted lower than this limit and the maximum current-sense amplifier gain is determined by Equation 5.

Equation 5. A C S A = V C S O ( m a x ) I O U T ( m a x ) × R S H U N T

Referring to Figure 7-1, the DC gain of the CSA is equal to R16/R15, and a high-frequency roll-off pole used for noise filtering is set by C13. These component values are repeated at R14, R13, and C12 on the CS+ pin of the differential amplifier, as shown.

The CSA output voltage, VCSO, serves as the input to the unity-gain LS-bus driver. In the overall system, the module with the highest VCSO output voltage becomes the leader module. It forward-biases the internal diode at the output of its respective LS-bus driver and determines the voltage on the load-share bus, VLS. All other modules with lower VCSO act as followers and they present a load on the IVDD of the leader module because of their internal 100kΩ resistors at their respective LS pins. The total additional bias-supply current for the leader module is equal to Nm×(VLS(max)/100kΩ).
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