ZHCSU66J August 2001 – December 2023 UCC29002 , UCC39002
PRODUCTION DATA
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
ADJ | 5 | O | Adjust amplifier output. This is the buffered output of the
error-amplifier block to adjust the output voltage of the power
supply being controlled. This voltage on this pin must always be
equal to or greater than VEAO + 1V. |
CS– | 1 | I | Current-sense amplifier inverting input. |
CS+ | 2 | I | Current-sense amplifier noninverting input. |
CSO | 8 | O | Current-sense amplifier output. |
EAO | 6 | O | Output for load-share error amplifier. (Transconductance error amplifier.) |
GND | 4 | – | Ground. Reference ground and power ground for all device functions. Connect this pin to the negative voltage sense (S-) path of the converter. |
LS | 7 | I/O | Load-share bus. Output of the load-share bus-driver amplifier and input to the load-share bus receiver. |
VDD | 3 | I | Power supply input providing bias voltage to the device. Bypass with a good-quality, low-ESL capacitor with value from 0.1µF to 1µF, placed as close as possible to the VDD and GND pins. |