The enable pin (EN) is active high and is compatible with standard TTL-CMOS levels. A V_EN below 0.5V (maximum) turns the regulator off and drops the GND pin current to approximately 10nA. When EN is used to shut down the regulator, all charge is removed from the pass transistor gate. A V_EN above 1.7V (minimum) turns the regulator on and the output ramps back up to a regulated V_OUT (see Figure 5-39).

When shutdown capability is not required, connect EN to V_IN. However, the pass transistor potentially does not discharge using this configuration, causing the pass transistor to be left on (enhanced) for a significant time after V_IN is removed. This scenario results in reverse current flow (if the IN pin is low impedance) and faster ramp times upon power up. In addition, for V_IN ramp times slower than a few milliseconds, the output potentially overshoots upon power up.

Current limit foldback prevents device start-up under some conditions. See the Internal Current Limit section.