ZHCU759 July   2021

 

  1.   说明
  2.   资源
  3.   特性
  4.   应用
  5.   5
  6. 1System Description
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1  System Control and Processing
      2. 2.2.2  Analog Front End
      3. 2.2.3  Input Voltage Monitoring: 5 V, 20 V, 40 V, and ±5 V
      4. 2.2.4  Bidirectional Current Sense: ±2 A
      5. 2.2.5  Unipolar Current Sense: 0.25 A to 1 A
      6. 2.2.6  TMP461-SP: Local and Remote Temperature Sensing
      7. 2.2.7  NTC Thermistor Temperature Sensing
      8. 2.2.8  Adjustable Voltage Source
      9. 2.2.9  Fixed Output Current Source
      10. 2.2.10 Adjustable 4-mA Current Source
      11. 2.2.11 Power Tree and Power Sequencing
    3. 2.3 Highlighted Products
      1. 2.3.1  MSP430FR5969-SP
      2. 2.3.2  ADC128S102QML-SP
      3. 2.3.3  DAC121S101QML-SP
      4. 2.3.4  LMP7704-SP
      5. 2.3.5  INA901-SP
      6. 2.3.6  LM4050QML-SP
      7. 2.3.7  LM158QML-SP
      8. 2.3.8  LM139QML-SP
      9. 2.3.9  TMP461-SP
      10. 2.3.10 TPS7A4501-SP
      11. 2.3.11 TPS7H2201-SP
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software
    2. 3.2 Test Setup
      1. 3.2.1 Voltage Monitor Test Setup
      2. 3.2.2 Current Monitor Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Voltage Measurement - Noise Floor Results
      2. 3.3.2 Voltage Measurement - Linearity Results
      3. 3.3.3 Current Measurement - Noise Floor Results
      4. 3.3.4 Current Measurement - Linearity Results
      5. 3.3.5 Analog Outputs
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Documentation Support
    3. 4.3 支持资源
    4. 4.4 Trademarks
  10. 5About the Author

Software

Solution-specific and device-independent files are provided as .c/.h files. The main.c file provides the initialization of the GPIOs, I2C and SPI communication, ADC or DAC setup, PWM setup for the nonsynchronous boost, and power sequencing. The software is required to power up the board properly as well as read the ADC data.

To program the MSP430FR5969-SP independently, make sure no other jumpers are installed and provide an external 3.3 V to J16 (for the external ADC circuit) and J36 (for the integrated ADC solution). This only powers on the MSP430FR5969-SP so that adjustments to the power sequencing are done without damaging the ADC128S102QML-SP.

In main.c the variable "ext_int" is set to either 0 or 1 to run two different functions. When "ext_int" is set to 0, it runs the code to read all the channels from the external ADC via SPI. If "ext_int" is set to 1, the code reads all inputs from the integrated ADC. The ADC reads are done via low power interrupts to save on processing power of the MSP430. The values are then stored in the FRAM and are accessed when the software is paused. Each ADC channel corresponds to a specific point in memory with a memory word length default of 1000 and can be changed via the variable WRITE_SIZE.

GUID-20210406-CA0I-7PH9-JBLK-KD5DTH2KLBRB-low.gif Figure 3-1 Software Flow

To access the data in FRAM from Code Composer Studio (CCS), open the memory browser (View → Memory Browser) and type the starting address outlined in Table 3-1 and Table 3-2. Select save memory and save it as a .dat file (this file type can be opened with Microsoft® Excel®). The save memory function allows saving of the data in different formats for different processing requirements. After selecting the file location to save the file, enter the start address and specify the length of the array (default is 1000). Opening the .dat file shows the raw ADC data in column one. To convert the integer values, use the ADC equation (Equation 5) in a column next to the data captured to convert the integer values to voltage, where n is the number of bits used for the measurement.

Equation 5. A D C   c o n v e r s i o n   e q u a t i o n = D i g i t a l   O u t p u t × V r e f 2 n
Table 3-1 Memory Location and Variable Name: External ADC Configuration
ADC BUFFER ADC128S102-SP ADC CHANNEL MEASURED RAIL MEMORY LOCATION

adc_buffer_0

IN0

500 µA

x004400

adc_buffer_1

IN1

±2 A

x0047E8

adc_buffer_2

IN2

20 V

x004BD0

adc_buffer_3

IN3

Temperature voltage

x004FB8

adc_buffer_4

IN4

±5 V

x0053A0

adc_buffer_5

IN5

40 V

x005788

adc_buffer_6

IN6

0.25 A–1 A

x005B70

adc_buffer_7

IN7

5 V

x005F58

Table 3-2 Memory Location and Variable Name: MSP430™ Configuration
ADC BUFFER MSP430 ADC12 CHANNEL MEASURED RAIL MEMORY LOCATION

adc_buffer_0

A0

500 µA

x004400
adc_buffer_1

A8

40 V

x0047E8
adc_buffer_2

A9

0.25 A–1 A

x004BD0
adc_buffer_3

A10

5 V

x004FB8
adc_buffer_4

A12

±2 A

x0053A0
adc_buffer_5

A13

20 V

x005788
adc_buffer_6

A14

Temperature voltage

x005B70
adc_buffer_7

A15

±5 V

x005F58