The LMK04832 is a dual-PLL jitter cleaner and clock generator for JESD204B systems. The LMK04832 has 14 clock outputs from PLL2 which can be configured to drive seven JESD204B converters or other logic devices using device and SYSREF clocks. The LMK04832 supports two ranges of VCOs at 2440 to 2580 MHz, and 2945 to 3255 MHz. The LMK04832 also supports a distribution mode, where it accepts the high-frequency reference signal and distributes it to all 14 clock outputs without adding a PLL noise.