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固定方向电压转换器

CD40109B-Q1

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汽车类 CMOS 四路低向高电压位转换器（20V 额定电压）

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数据表

CD40109B-Q1

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数据表 立即订购

米6体育平台手机版_好二三四详情

Technology family CD4000 Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 3 High input voltage (max) (V) 18 Vout (min) (V) 0 Vout (max) (V) 18 Data rate (max) (Mbps) 24 IOH (max) (mA) -6.8 IOL (max) (mA) -6.8 Supply current (max) (µA) 18 Features 54.59, 79.56 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
Technology family CD4000 Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 3 High input voltage (max) (V) 18 Vout (min) (V) 0 Vout (max) (V) 18 Data rate (max) (Mbps) 24 IOH (max) (mA) -6.8 IOL (max) (mA) -6.8 Supply current (max) (µA) 18 Features 54.59, 79.56 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
SOP (NS) 16 79.56 mm² 10.2 x 7.8
  • Qualified for Automotive Applications
  • Independent of Power Supply Sequence Considerations
    • VCC Can Exceed VDD
    • Input Signals can Exceed Both VCC and VDD
  • Up and Down Level-Shifting Capability
  • Three-State Outputs With Separate Enable Controls
  • Standardized Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 20 V
  • Maximum Input Current:
    • 1 µA at 18 V Over Full Package-Temperature Range
    • 100 nA at 18 V and 25°C
  • Noise Margin (Full Package-Temperature Range):
    • 1 V at VCC = 5 V, VDD = 10 V
    • 2 V at VCC = 10 V, VDD = 15 V
  • 5-V, 10-V, and 15-V Parametric Ratings
  • Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard specifications for Description of ’B’ Series CMOS Devices"
  • Latch-Up Performance Meets 50 mA per JESD 78, Class I
  • APPLICATIONS
    • High-or-Low Level-Shifting With Three-State Outputs for Unidirectional or Bidirectional Bussing
    • Isolation of Logic Subsystem Using Separate Power Supplies from Supply Sequencing, Supply Loss, and Supply Regulation Considerations
  • Qualified for Automotive Applications
  • Independent of Power Supply Sequence Considerations
    • VCC Can Exceed VDD
    • Input Signals can Exceed Both VCC and VDD
  • Up and Down Level-Shifting Capability
  • Three-State Outputs With Separate Enable Controls
  • Standardized Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 20 V
  • Maximum Input Current:
    • 1 µA at 18 V Over Full Package-Temperature Range
    • 100 nA at 18 V and 25°C
  • Noise Margin (Full Package-Temperature Range):
    • 1 V at VCC = 5 V, VDD = 10 V
    • 2 V at VCC = 10 V, VDD = 15 V
  • 5-V, 10-V, and 15-V Parametric Ratings
  • Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard specifications for Description of ’B’ Series CMOS Devices"
  • Latch-Up Performance Meets 50 mA per JESD 78, Class I
  • APPLICATIONS
    • High-or-Low Level-Shifting With Three-State Outputs for Unidirectional or Bidirectional Bussing
    • Isolation of Logic Subsystem Using Separate Power Supplies from Supply Sequencing, Supply Loss, and Supply Regulation Considerations

CD40109B contains four low-to-high-voltage level-shifting circuits. Each circuit will shift a low-voltage digital-logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a high-voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS.

The RCA-CD40109, unlike other low-to-high level-shifting circuits, does not require the presence of the high-voltage supply (VDD) before the application of either the low-voltage supply (VCC) or the input signals. There are no restrictions on the sequence of application of VDD, VCC, or the input signals. In addition, with one exception there are no restrictions on the relative magnitudes of the supply voltages or input signals within the device maximum ratings, provided that the input signal swings between VSS and at least 0.7 VCC; VCC may exceed VDD, and input signals may exceed VCC and VDD. When operated in the mode VCC > VDD, the CD40109 will operate as a high-to-low level-shifter.

The CD40109 also features individual three-state output capability. A low level on any of the separately enabled three-state output controls produces a high-impedance state in the corresponding output.

CD40109B contains four low-to-high-voltage level-shifting circuits. Each circuit will shift a low-voltage digital-logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a high-voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS.

The RCA-CD40109, unlike other low-to-high level-shifting circuits, does not require the presence of the high-voltage supply (VDD) before the application of either the low-voltage supply (VCC) or the input signals. There are no restrictions on the sequence of application of VDD, VCC, or the input signals. In addition, with one exception there are no restrictions on the relative magnitudes of the supply voltages or input signals within the device maximum ratings, provided that the input signal swings between VSS and at least 0.7 VCC; VCC may exceed VDD, and input signals may exceed VCC and VDD. When operated in the mode VCC > VDD, the CD40109 will operate as a high-to-low level-shifter.

The CD40109 also features individual three-state output capability. A low level on any of the separately enabled three-state output controls produces a high-impedance state in the corresponding output.
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类型 标题 下载最新的英语版本 日期
* 数据表 CD40109B-Q1 CMOS Quad Low-to-High Voltage Level Shifter 数据表 (Rev. A) 2011年 8月 24日

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包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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