CD4585B
- Expansion to 8, 12, 16.....4N bits by cascading units
- Medium-speed operation:
compares two 4-bit words in 180 ns (typ.) at 10 V - 100% tested for quiescent current at 20 V
- Standardized symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package temperature range) =
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V - Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
- Applications:
- Servo motor controls
- Process controllers
CD4585B is a 4-bit magnitude comparator designed for use in computer and logic applications that require the comparison of two 4-bit words. This logic circuit determines whether one 4-bit word (Binary or BCD) is "less than", "equal to", or "greater than" a second 4-bit word.
The CD4585B has eight comparing inputs (A3, B3, through A0, B0), three outputs (A<B,A = B,A>B) and three cascading inputs (A<B,A=B,A>B) that permit systems designers to expand the comparator function to 8, 12, 16.....4N bits. When a single CD4585B is used, the cascading inputs are connected as follows: (A<B) = low, (A=B) = high, (A>B) = high.
Cascading these units for comparison of more than 4 bits is accomplished as shown in Fig. 13.
The CD4585B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
其他器件和数据表
该数据表适用于 CD4585B 和 CD4585B-MIL
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | CD4585B TYPES 数据表 (Rev. B) | 2003年 6月 27日 | |||
* | SMD | CD4585B SMD 7703702EA | 2016年 6月 21日 | |||
选择指南 | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||||
应用手册 | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||||
选择指南 | 逻辑器件指南 2014 (Rev. AA) | 最新英语版本 (Rev.AB) | 2014年 11月 17日 | |||
用户指南 | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||||
应用手册 | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||||
用户指南 | Signal Switch Data Book (Rev. A) | 2003年 11月 14日 | ||||
应用手册 | Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics | 2001年 12月 3日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
14-24-LOGIC-EVM — 采用 14 引脚至 24 引脚 D、DB、DGV、DW、DYY、NS 和 PW 封装的逻辑米6体育平台手机版_好二三四通用评估模块
14-24-LOGIC-EVM 评估模块 (EVM) 旨在支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
PDIP (N) | 16 | Ultra Librarian |
SOP (NS) | 16 | Ultra Librarian |
TSSOP (PW) | 16 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点