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单稳态多谐振荡器

CD74HC4538

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高速 CMOS 逻辑双路可重触发精密单稳多频振荡器

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数据表

CD74HC4538

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数据表 立即订购

米6体育平台手机版_好二三四详情

Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Technology family HC Input type Standard CMOS Output type Push-Pull Supply current (µA) 80 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Retriggerable Operating temperature range (°C) -55 to 125 Rating Catalog
Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Technology family HC Input type Standard CMOS Output type Push-Pull Supply current (µA) 80 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Retriggerable Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Retriggerable/Resettable Capability
  • Trigger and Reset Propagation Delays Independent of RX, CX
  • Triggering from the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs Available
  • Separate Resets
  • Wide Range of Output Pulse Widths
  • Schmitt Trigger Input on A and B\ Inputs
  • Retrigger Time is Independent of CX
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH
  • Retriggerable/Resettable Capability
  • Trigger and Reset Propagation Delays Independent of RX, CX
  • Triggering from the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs Available
  • Separate Resets
  • Wide Range of Output Pulse Widths
  • Schmitt Trigger Input on A and B\ Inputs
  • Retrigger Time is Independent of CX
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

The ’HC4538 and ’HCT4538 are dual retriggerable/resettable monostable precision multivibrators for fixed voltage timing applications. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The propagation delay from trigger input-to-output transition and the propagation delay from reset input-to-output transition are independent of RX and CX.

Leading-edge triggering (A) and trailing edge triggering (B)\ inputs are provided for triggering from either edge of the input pulse. An unused "A" input should be tied to GND and an unused B\ should be tied to VCC. On power up the IC is reset. Unused resets and sections must be terminated. In normal operation the circuit retriggers on the application of each new trigger pulse. To operate in the non-triggerable mode Q\ is connected to B\ when leading edge triggering (A) is used or Q is connected to A when trailing edge triggering (B)\ is used. The period (. CMIN is 0pF.

The ’HC4538 and ’HCT4538 are dual retriggerable/resettable monostable precision multivibrators for fixed voltage timing applications. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The propagation delay from trigger input-to-output transition and the propagation delay from reset input-to-output transition are independent of RX and CX.

Leading-edge triggering (A) and trailing edge triggering (B)\ inputs are provided for triggering from either edge of the input pulse. An unused "A" input should be tied to GND and an unused B\ should be tied to VCC. On power up the IC is reset. Unused resets and sections must be terminated. In normal operation the circuit retriggers on the application of each new trigger pulse. To operate in the non-triggerable mode Q\ is connected to B\ when leading edge triggering (A) is used or Q is connected to A when trailing edge triggering (B)\ is used. The period (. CMIN is 0pF.
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类型 标题 下载最新的英语版本 日期
* 数据表 CD54HC4538, CD74HC4538, CD54HCT4538, CD74HCT4538 数据表 (Rev. E) 2003年 10月 16日
应用手册 具有响应检测和系统复位功能的控制器 PDF | HTML 英语版 PDF | HTML 2023年 3月 22日
应用手册 Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
应用手册 使用 SN74LVC1G123 单稳多谐振荡器进行设计 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2021年 7月 20日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用户指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
应用手册 TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
应用手册 CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
应用手册 使用逻辑器件进行设计 (Rev. C) 1997年 6月 1日
应用手册 Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
应用手册 Live Insertion 1996年 10月 1日
应用手册 SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
应用手册 Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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用户指南: PDF | HTML
英语版 (Rev.B): PDF | HTML
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封装 引脚 CAD 符号、封装和 3D 模型
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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