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D 型锁存器

SN54ALS996

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8 位 D 类边沿触发读回锁存器

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SN54ALS996

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米6体育平台手机版_好二三四详情

Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type TTL Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) 2.6 Supply current (max) (µA) 85000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type TTL Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) 2.6 Supply current (max) (µA) 85000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (JT) 24 221.44 mm² 32 x 6.92 LCCC (FK) 28 130.6449 mm² 11.43 x 11.43
  • 3-State I/O-Type Read-Back Inputs
  • Bus-Structured Pinout
  • T/C\ Determines True or Complementary Data at Q Outputs
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs

 
  • 3-State I/O-Type Read-Back Inputs
  • Bus-Structured Pinout
  • T/C\ Determines True or Complementary Data at Q Outputs
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs

 

These 8-bit latches are designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus. The Q outputs are designed with bus-driving capability.

The edge-triggered flip-flops enter the data on the low-to-high transition of the clock (CLK) input when the enable () input is low. Data can be read back onto the data inputs by taking the read () input low, in addition to having low. When EN\ is high, both the read-back and write modes are disabled. Transitions on should only be made with CLK high to prevent false clocking.

The polarity of the Q outputs can be controlled by the polarity (T/C\) input. When T/C\ is high, Q is the same as is stored in the flip-flops. When T/C\ is low, the output data is inverted. The Q outputs can be placed in the high-impedance state by taking the output-enable () input high. does not affect the internal operation of the register. Old data can be retained or new data can be entered while the outputs are off.

A low level at the clear () input resets the internal registers low. The clear function is asynchronous and overrides all other register functions.

The -1 version of the SN74ALS996 is identical to the standard version, except that the recommended maximum IOL for the -1 version is increased to 48 mA. There is no -1 version of the SN54ALS996.

The SN54ALS996 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS996 is characterized for operation from 0°C to 70°C.

These 8-bit latches are designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus. The Q outputs are designed with bus-driving capability.

The edge-triggered flip-flops enter the data on the low-to-high transition of the clock (CLK) input when the enable () input is low. Data can be read back onto the data inputs by taking the read () input low, in addition to having low. When EN\ is high, both the read-back and write modes are disabled. Transitions on should only be made with CLK high to prevent false clocking.

The polarity of the Q outputs can be controlled by the polarity (T/C\) input. When T/C\ is high, Q is the same as is stored in the flip-flops. When T/C\ is low, the output data is inverted. The Q outputs can be placed in the high-impedance state by taking the output-enable () input high. does not affect the internal operation of the register. Old data can be retained or new data can be entered while the outputs are off.

A low level at the clear () input resets the internal registers low. The clear function is asynchronous and overrides all other register functions.

The -1 version of the SN74ALS996 is identical to the standard version, except that the recommended maximum IOL for the -1 version is increased to 48 mA. There is no -1 version of the SN54ALS996.

The SN54ALS996 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS996 is characterized for operation from 0°C to 70°C.

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类型 标题 下载最新的英语版本 日期
* 数据表 8-Bit D-Type Edge-Triggered Read-Back Latches 数据表 (Rev. B) 1995年 1月 1日
* SMD SN54ALS996 SMD 5962-89945 2016年 6月 21日
应用手册 Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 2022年 12月 15日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
应用手册 TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
应用手册 Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997年 8月 1日
应用手册 使用逻辑器件进行设计 (Rev. C) 1997年 6月 1日
应用手册 Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
应用手册 Live Insertion 1996年 10月 1日
应用手册 Advanced Schottky (ALS and AS) Logic Families 1995年 8月 1日

设计和开发

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封装 引脚 CAD 符号、封装和 3D 模型
CDIP (JT) 24 Ultra Librarian
LCCC (FK) 28 Ultra Librarian
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订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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