SN74AHC573-Q1

Name: SN74AHC573-Q1
Brand: TI
SKU: SN74AHC573-Q1
Price: 0.231 USD

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具有三态输出的汽车类八路透明 D 级锁存器

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数据表

document-pdfAcrobat Octal Transparent D-Type Latch With 3-State Outputs 数据表 (Rev. A) (英语)

SN74AHC573-Q1

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数据表

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Number of channels

8

Technology family

AHC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Operating temperature range (°C)

-40 to 125

Rating

Automotive

Number of channels

8

Technology family

AHC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Operating temperature range (°C)

-40 to 125

Rating

Automotive

TSSOP (PW)

20

41.6 mm² 6.5 x 6.4

Qualified for Automotive Applications
Operating Range 2-V to 5.5-V V_CC
3-State Outputs Directly Drive Bus Lines

Qualified for Automotive Applications
Operating Range 2-V to 5.5-V V_CC
3-State Outputs Directly Drive Bus Lines

The SN74AHC573 is an octal transparent D-type latch designed for 2-V to 5.5-V V_CC operation.

When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74AHC573 is an octal transparent D-type latch designed for 2-V to 5.5-V V_CC operation.

When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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