SN74CB3T3253
- Output Voltage Translation Tracks VCC
- Supports Mixed-Mode Signal Operation On All Data I/O Ports
- 5-V Input Down To 3.3-V Output Level Shift With 3.3-V VCC
- 5-V/3.3-V Input Down To 2.5-V Output Level Shift With 2.5-V VCC
- 5-V Tolerant I/Os With Device Powered-Up or Powered-Down
- Bidirectional Data Flow, With Near-Zero Propagation Delay
- Low ON-State Resistance (ron) Characteristics (ron = 5 Typical)
- Low Input/Output Capacitance Minimizes Loading (Cio(OFF) = 5 pF Typical)
- Data and Control Inputs Provide Undershoot Clamp Diodes
- Low Power Consumption (ICC = 20 µA Max)
- VCC Operating Range From 2.3 V to 3.6 V
- Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
- Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
- Supports Digital Applications: Level Translation, USB Interface, Memory Interleaving, Bus Isolation
- Ideal for Low-Power Portable Equipment
The SN74CB3T3253 is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T3253 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1).
The SN74CB3T3253 is organized as two 1-of-4 multiplexer/demultiplexers with separate output-enable (1OE\, 2OE\) inputs. The select (S0, S1) inputs control the data path of each multiplexer/demultiplexer. When OE\ is low, the associated multiplexer/demultiplexer is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated multiplexer/demultiplexer is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | SN74CB3T3253 数据表 | 2003年 10月 15日 | |||
应用手册 | 选择正确的米6体育平台手机版_好二三四 (TI) 信号开关 (Rev. E) | PDF | HTML | 英语版 (Rev.E) | PDF | HTML | 2022年 8月 5日 | |
应用手册 | CBT-C、CB3T 和 CB3Q 信号开关系列 (Rev. C) | PDF | HTML | 英语版 (Rev.C) | PDF | HTML | 2022年 3月 11日 | |
应用手册 | 多路复用器和信号开关词汇表 (Rev. B) | 英语版 (Rev.B) | PDF | HTML | 2022年 3月 11日 | ||
应用简报 | 利用关断保护信号开关消除电源时序 (Rev. C) | 英语版 (Rev.C) | PDF | HTML | 2021年 10月 21日 | ||
选择指南 | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||||
应用手册 | How to Select Little Logic (Rev. A) | 2016年 7月 26日 | ||||
应用手册 | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||||
选择指南 | 逻辑器件指南 2014 (Rev. AA) | 最新英语版本 (Rev.AB) | 2014年 11月 17日 | |||
用户指南 | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||||
应用手册 | 选择正确的电平转换解决方案 (Rev. A) | 英语版 (Rev.A) | 2006年 3月 23日 | |||
更多文献资料 | Digital Bus Switch Selection Guide (Rev. A) | 2004年 11月 10日 | ||||
应用手册 | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||||
用户指南 | Signal Switch Data Book (Rev. A) | 2003年 11月 14日 | ||||
应用手册 | Bus FET Switch Solutions for Live Insertion Applications | 2003年 2月 7日 |
设计和开发
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封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
SOIC (D) | 16 | Ultra Librarian |
SSOP (DBQ) | 16 | Ultra Librarian |
TSSOP (PW) | 16 | Ultra Librarian |
TVSOP (DGV) | 16 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点
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