SN74LV11A-EP
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of –40°C to 105°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- 2-V to 5.5-V VCC Operation
- Typical VOLP (Output Ground Bounce)
<0.8 V at VCC= 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C - Supports Mixed-Mode Voltage Operation on All Ports
- Ioff Supports Partial-Power-Down Mode Operation
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
This triple 3-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.
The SN74LV11A performs the Boolean function Y = A • B • C or Y = (A\ + B\ + C\)\ in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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功能与比较器件相似
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | SN74LV11A-EP 数据表 (Rev. A) | 2004年 5月 11日 | |||
* | VID | SN74LV11A-EP VID V6204692 | 2016年 6月 21日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
TSSOP (PW) | 14 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点