SN74LV161284

Name: SN74LV161284
Brand: TI
SKU: SN74LV161284
Price: 1.631 USD

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19 位总线接口

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数据表

document-pdfAcrobat SN74LV161284 数据表 (Rev. C) (英语)

SN74LV161284

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数据表

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Technology family

LV-A

Applications

IEEE1284

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

LV-A

Applications

IEEE1284

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SSOP (DL)

48

164.358 mm² 15.88 x 10.35

TSSOP (DGG)

48

101.25 mm² 12.5 x 8.1

4.5-V to 5.5-V V_CC Operation
1.4-k Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors
Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 250 mA Per JEDEC 17
ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 300-V Machine Model (A115-A)
- 2000-V Charged-Device Model (C101)

4.5-V to 5.5-V V_CC Operation
1.4-k Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors
Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 250 mA Per JEDEC 17
ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 300-V Machine Model (A115-A)
- 2000-V Charged-Device Model (C101)

The SN74LV161284 is designed for 4.5-V to 5.5-V V_CC operation. This device provides asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

This device has eight bidirectional bits; data can flow in the A-to-B direction when DIR is high, and in the B-to-A direction when DIR is low. This device also has five drivers, which drive the cable side, and four receivers. The SN74LV161284 has one receiver dedicated to the HOST LOGIC line and a driver to drive the PERI LOGIC line.

The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the B, Y, and PERI LOGIC OUT outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive requirements as specified in the IEEE Std 1284-I (level-1 type) and IEEE Std 1284-II (level-2 type) parallel peripheral-interface specifications. Except for HOST LOGIC IN and PERI LOGIC OUT, all cable-side pins have a 1.4-k integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low state or if the output voltage is above V_CC CABLE. If V_CC CABLE is off, PERI LOGIC OUT is set to low.

The device has two supply voltages. V_CC is designed for 4.5-V to 5.5-V operation. V_CC CABLE supplies the output buffers of the cable side only and is designed for 4.5-V to 5.5-V operation.

The SN74LV161284 is designed for 4.5-V to 5.5-V V_CC operation. This device provides asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

This device has eight bidirectional bits; data can flow in the A-to-B direction when DIR is high, and in the B-to-A direction when DIR is low. This device also has five drivers, which drive the cable side, and four receivers. The SN74LV161284 has one receiver dedicated to the HOST LOGIC line and a driver to drive the PERI LOGIC line.

The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the B, Y, and PERI LOGIC OUT outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive requirements as specified in the IEEE Std 1284-I (level-1 type) and IEEE Std 1284-II (level-2 type) parallel peripheral-interface specifications. Except for HOST LOGIC IN and PERI LOGIC OUT, all cable-side pins have a 1.4-k integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low state or if the output voltage is above V_CC CABLE. If V_CC CABLE is off, PERI LOGIC OUT is set to low.

The device has two supply voltages. V_CC is designed for 4.5-V to 5.5-V operation. V_CC CABLE supplies the output buffers of the cable side only and is designed for 4.5-V to 5.5-V operation.

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