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TPS3808 Low-Quiescent-Current, Programmable-Delay Supervisory Circuit
SBVS050M
May 2004 – March 2023
TPS3808
PRODUCTION DATA
CONTENTS
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TPS3808 Low-Quiescent-Current, Programmable-Delay Supervisory Circuit
1
Features
2
Applications
3
Description
4
Revision History
5
Device Voltage Thresholds
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Switching Characteristics
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
SENSE Input
8.3.2
Selecting the RESET Delay Time
8.3.3
Manual RESET ( MR) Input
8.3.4
RESET Output
8.4
Device Functional Modes
8.4.1
Normal Operation (VDD > VDD(min))
8.4.2
Above Power-On Reset but Less Than VDD(min) (VPOR < VDD < VDD(min))
8.4.3
Below Power-On Reset (VDD < VPOR)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Immunity to SENSE Pin Voltage Transients
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.1.1.1
Evaluation Modules
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
DRV|6
MPDS216E
DBV|6
MPDS026Q
Thermal pad, mechanical data (Package|Pins)
DRV|6
QFND087M
Orderable Information
sbvs050m_oa
sbvs050m_pm
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