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UCC28064A Natural Interleaving™ Transition-Mode PFC Controller with High Light-Load Efficiency
SLUSC60B
December 2017 – October 2019
UCC28064A
PRODUCTION DATA.
CONTENTS
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UCC28064A Natural Interleaving™ Transition-Mode PFC Controller with High Light-Load Efficiency
1
Features
2
Applications
3
Description
Device Images
Simplified Application
4
Revision History
5
Description (Continued)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Principles of Operation
8.3.2
Natural Interleaving
8.3.3
On-Time Control, Maximum Frequency Limiting, Restart Timer and Input Voltage Feed-Forward compensation
8.3.4
Distortion Reduction
8.3.5
Zero-Current Detection and Valley Switching
8.3.6
Phase Management and Light-Load Operation
8.3.7
Burst Mode Operation
8.3.8
External Disable
8.3.9
Improved Error Amplifier
8.3.10
Soft Start
8.3.11
Brownout Protection
8.3.12
Line Dropout Detection
8.3.13
VREF
8.3.14
VCC
8.3.15
System Level Protections
8.3.15.1
Failsafe OVP - Output Over-voltage Protection
8.3.15.2
Overcurrent Protection
8.3.15.3
Open-Loop Protection
8.3.15.4
VCC Undervoltage Lock-Out (UVLO) Protection
8.3.15.5
Phase-Fail Protection
8.3.15.6
CS - Open, TSET - Open and Short Protection
8.3.15.7
Thermal Shutdown Protection
8.3.15.8
Fault Logic Diagram
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Custom Design With WEBENCH® Tools
9.2.2.2
Inductor Selection
9.2.2.3
ZCD Resistor Selection RZA, RZB
9.2.2.4
HVSEN
9.2.2.5
Output Capacitor Selection
9.2.2.6
Selecting RS For Peak Current Limiting
9.2.2.7
Power Semiconductor Selection (Q1, Q2, D1, D2)
9.2.2.8
Brownout Protection
9.2.2.9
Converter Timing
9.2.2.10
Programming VOUT
9.2.2.11
Voltage Loop Compensation
9.2.3
Application Curves
9.2.3.1
Input Ripple Current Cancellation with Natural Interleaving
9.2.3.2
Brownout Protection
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Package Option Addendum
12.1
Packaging Information
13
Device and Documentation Support
13.1
Device Support
13.1.1
Development Support
13.1.1.1
Custom Design With WEBENCH® Tools
13.2
Documentation Support
13.2.1
Related Documentation
13.3
Receiving Notification of Documentation Updates
13.4
Community Resources
13.5
Trademarks
13.6
Electrostatic Discharge Caution
13.7
Glossary
14
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
D|16
MPDS178G
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slusc60b_oa
slusc60b_pm
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