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UCD90240 24-Rail PMBus Power Sequencer and System Manager
SLVSCW0
February 2015
UCD90240
PRODUCTION DATA.
CONTENTS
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UCD90240 24-Rail PMBus Power Sequencer and System Manager
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Nonvolatile Memory Characteristics
6.7
I2C/PMBUS Timing Requirements
7
Detailed Description
7.1
Device Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
TI Fusion GUI
7.3.2
PMBUS Interface
7.3.3
Rail Setup
7.3.4
Rail Monitoring Configuration
7.3.5
GPI Configuration
7.3.6
Rail Sequence Configuration
7.3.7
Fault Responses Configuration
7.3.8
GPO Configuration
7.3.8.1
Command Controlled GPO
7.3.8.2
Logic GPO
7.3.9
Margining Configuration
7.3.10
Pin Selected Rail States Configuration
7.3.11
Watchdog Timer
7.3.12
System Reset Function
7.3.13
Cascading Multiple Devices
7.3.14
Voltage Monitoring
7.3.15
Status Monitoring
7.3.16
Data and Error Logging to EEPROM Memory
7.3.17
Black Box First Fault Logging
7.3.18
PMBUS Address Selection
7.3.19
ADC Reference
7.3.20
Device Reset
7.3.21
Brownout
7.3.22
Device Configuration and Programming
7.3.23
Internal Fault Management
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Application Diagram
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Trademarks
11.2
Electrostatic Discharge Caution
11.3
Glossary
12
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
ZRB|157
MPBGA32B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
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