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ADS8688AT 16-Bit, 500-kSPS, 8-Channel, Single-Supply, SAR ADC With Bipolar Input Ranges
SBAS813
June 2018
ADS8688AT
PRODUCTION DATA.
CONTENTS
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ADS8688AT 16-Bit, 500-kSPS, 8-Channel, Single-Supply, SAR ADC With Bipolar Input Ranges
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements: Serial Interface
6.7
Switching Characteristics: Serial Interface
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Analog Inputs
7.3.2
Analog Input Impedance
7.3.3
Input Overvoltage Protection Circuit
7.3.4
Programmable Gain Amplifier (PGA)
7.3.5
Second-Order, Low-Pass Filter (LPF)
7.3.6
ADC Driver
7.3.7
Multiplexer (MUX)
7.3.8
Reference
7.3.8.1
Internal Reference
7.3.8.2
External Reference
7.3.9
Auxiliary Channel
7.3.9.1
Input Driver for the AUX Channel
7.3.10
ADC Transfer Function
7.3.11
Alarm Feature
7.4
Device Functional Modes
7.4.1
Device Interface
7.4.1.1
Digital Pin Description
7.4.1.1.1
CS (Input)
7.4.1.1.2
SCLK (Input)
7.4.1.1.3
SDI (Input)
7.4.1.1.4
SDO (Output)
7.4.1.1.5
DAISY (Input)
7.4.1.1.6
RST/PD (Input)
7.4.1.2
Data Acquisition Example
7.4.1.3
Host-to-Device Connection Topologies
7.4.1.3.1
Daisy-Chain Topology
7.4.1.3.2
Star Topology
7.4.2
Device Modes
7.4.2.1
Continued Operation in the Selected Mode (NO_OP)
7.4.2.2
Frame Abort Condition (FRAME_ABORT)
7.4.2.3
STANDBY Mode (STDBY)
7.4.2.4
Power-Down Mode (PWR_DN)
7.4.2.5
Auto Channel Enable With Reset (AUTO_RST)
7.4.2.6
Manual Channel n Select (MAN_Ch_n)
7.4.2.7
Channel Sequencing Modes
7.4.2.8
Reset Program Registers (RST)
7.5
Register Maps
7.5.1
Command Register Description
7.5.2
Program Register Description
7.5.2.1
Program Register Read/Write Operation
7.5.2.2
Program Register Map
7.5.2.3
Program Register Descriptions
7.5.2.3.1
Auto-Scan Sequencing Control Registers
7.5.2.3.1.1
Auto-Scan Sequence Enable Register (address = 01h)
Table 11.
AUTO_SEQ_EN Field Descriptions
7.5.2.3.1.2
Channel Power Down Register (address = 02h)
Table 12.
Channel Power Down Register Field Descriptions
7.5.2.3.2
Device Features Selection Control Register (address = 03h)
Table 13.
Feature Select Register Field Descriptions
7.5.2.3.3
Range Select Registers (addresses 05h-0Ch)
Table 16.
Channel n Input Range Registers Field Descriptions
7.5.2.3.4
Alarm Flag Registers (Read-Only)
7.5.2.3.4.1
ALARM Overview Tripped-Flag Register (address = 10h)
Table 17.
ALARM Overview Tripped-Flag Register Field Descriptions
7.5.2.3.4.2
Alarm Flag Registers: Tripped and Active (address = 11h to 14h)
Table 18.
ALARM Ch0-3 Tripped-Flag Register Field Descriptions
Table 19.
ALARM Ch0-3 Active-Flag Register Field Descriptions
Table 20.
ALARM Ch4-7 Tripped-Flag Register Field Descriptions
Table 21.
ALARM Ch4-7 Active-Flag Register Field Descriptions
7.5.2.3.5
Alarm Threshold Setting Registers
Table 22.
Channel n Hysteresis Register Field Descriptions (n = 0 to 7)
Table 23.
Channel n High Threshold MSB Register Field Descriptions (n = 0 to 7)
Table 24.
Channel n High Threshold LSB Register Field Descriptions (n = 0 to 7)
Table 25.
Channel n Low Threshold MSB Register Field Descriptions (n = 0 to 7)
Table 26.
Channel n Low Threshold MSB Register Field Descriptions (n = 0 to 7)
7.5.2.3.6
Command Read-Back Register (address = 3Fh)
Table 27.
Command Read-Back Register Field Descriptions
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Phase-Compensated, 8-Channel, Multiplexed Data Acquisition System for Power Automation
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.2.2
16-Bit, 8-Channel, Integrated Analog Input Module for Programmable Logic Controllers (PLCs)
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
DBT|38
MPDS368A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbas813_oa
sbas813_pm
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